I have a code which is duplicated multiple times based on RTL configuration. I am trying to make it generic using generate block.
// If MAX = 4, temp assignment must look like below.
// i=0 -> assign temp = `RTL_HIERARCHY.val0;
// i=1 -> assign temp = `RTL_HIERARCHY.val2;
// i=2 -> assign temp = `RTL_HIERARCHY.val4;
// i=3 -> assign temp = `RTL_HIERARCHY.val6;
genvar i;
generate
for (i=0 ; i<MAX; i++) begin
wire temp;
assign temp = `RTL_HIERARCHY.val<NOT_SURE_WHAT_SHOULD_COME_HERE>;
end
endgenerate
Can someone advice how to make assignment to temp such that it will take desired effect.