Program Block

SystemVerilog
,
1

How we will connect a “Program Block” in test bench with the DUT ?
Can anyone show me a good example ?

2

In reply to MINSHAD A:

It is not recommended to use program blocks.

You can refer to this article to connect your testbench to your DUT.

3

Can I get more information about why using program block is not recommended ?
Because from “testbench.in” I came to know that program block works in reactive region and thus overcomes the race condition. But module block works in active region and does not overcomes the race condition.

4

In reply to MINSHAD A:

Can I get more information about why using program block is not recommended ?
Because from “testbench.in” I came to know that program block works in reactive region and thus overcomes the race condition. But module block works in active region and does not overcomes the race condition.

Did you read this link? You would not have made that statement about race conditions if you had.

Some more links: