Printing partial hierarchy

SystemVerilog
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1

Hi,

While using %m in $display it prints the full hierarchy. (e.g. tb.top.design.module.mem)

Is it possible to print partial hierarchy using $display? (e.g. module.mem)

Thanks,
Sunil.

2

Anything is possible in software! :)

SystemVerilog does not have anything built-in to do this. You will have to save the result of %m to as string and strip off what you don’t want to print.