Is there really a need to use constraints for something that can easily be done with a function call? Also, if you can write constraints, what should the randomize function do when all bits are ones?
Ben
In reply to ben@SystemVerilog.us:
A const cast means treat the expression as a constant value (I.e. non-random) value. The expression gets evaluated before randomization and is treated like a state variable.
i am getting this error plz help me OUT
// code here
class packet;
rand bit[10:0] varb = 11’b10000000000;
constraint pattern { varb == const’( {1’b1, varb[10:1]} ); }
endclass
module constr_blocks;
initial begin
packet pkt;
pkt = new();
repeat(10) begin
pkt.randomize();
$display(“\t value = %0d”,pkt.varb);
end
end
endmodule