Non Resettable Flops

SystemVerilog
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1

Hello Everyone,

I have some doubts,

  1. What are the purposes of using NON-Resettable Flop in design?
  2. Is there any definite place in design where it can be implemented and/or a place it must not be implemented?
  3. What are the actual benefit of using Non-Resettable flop? Are they actually Latch?
  4. What’s the behavior of these kind of flops in actual silicon chip?
  5. Why these do not create errors while running RTLs but only in GLS?

I would be really grateful for anyone’s input on these questions.

Regards,

2

In reply to pankajpattel:

  • Control registers needed for bootup need a reset.
  • Registers loaded by other inputs need not a reset.
  • Asynchronous resets typically use latches, but the implementation is up to the vendors.
  • Synchronous resets can force (mux) zeros as data.
  • As the Why these do not create errors while running RTLs but only in GLS?,
    that is not necessarily true. If you use type logic, the X’s will propagate through the design. If you use type bit, the registers are defaulted to zero at startup.

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3

In reply to pankajpattel:

BTW, the reasons non-resettable are desirable if functionality allows is because they take less area, use less power, and sometimes faster.