Mismatch in RTL Read and MIRRORED Value

Hello everyone,
May i please know the possible reasons for below error.
I am using the predefined uvm_reg sequence, “uvm_reg_hw_reset_seq”.
I am facing it since long. I have two separate reg map and a separate test to verify both.

UVM_ERROR (RegModel) Register “xxxx” value read from DUT (0x0000) does not match mirrored value (0x80).
The mirrored value is the DEFAULT value for the register. Where as the READ from DUT is still 0.
May i know the reasons for above error, or possible solution if anyone have fixed it earlier.