Macro defined with undefined typedef enums

SystemVerilog
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1

For any macro definition, is it true that the contents are not evaluated unless I actually use the macro somewhere else later in the code?

I.e. will this code


`define ABC(X)\
    (SOME_UNDEFINED_ENUM == X ? ANOTHER_UNDEFINED_ENUM : YET_ANOTHER_UNDEFINED_ENUM)

compile even if I never define a typedef enum so long as I never use the `ABC macro anywhere in my code?

2

Correct. Preprocessor text substitution takes place before compilation.