Long delay not working properly in Verilog

Hello,

I want to implement a delay of several hours for a bit to go high and drive the rest of the circuit. Using Quartus II 13.0sp1 and running the code on a simple Altera Cyclone II. I know vendor questions shouldn’t be asked here but I wanted to see if there was a mistake in my code. I basically want 5 delays for a start: 40 seconds OFF, 8 seconds ON, 40 seconds OFF, 8 seconds ON, 40 seconds OFF and repeat. But even such a small delay isnt working properly. Please see my comments in the code.

module stepper_test(clock,LED_test);
localparam FIRST_DIVIDER = 500000000; //10 SEC DELAY. Any extra zero causes overflow
localparam SECOND_DIVIDER = 50000000;//This also gives 10 sec delay when it should be 1 sec
localparam THIRD_DIVIDER = 500000000;
localparam FOURTH_DIVIDER = 50000000;
localparam FIFTH_DIVIDER = 500000000;

input clock;
reg [200:0] countPulse1= 1'b0;
reg [200:0] countPulse2= 1'b0;
reg [200:0] countPulse3= 1'b0;
reg [200:0] countPulse4= 1'b0;
reg [200:0] countPulse5= 1'b0;

output reg LED_test;
reg [31:0] time_in [N-1:0];
reg pulse = 1'b0; //LED is OFF at start
reg pin1;
reg pin0;

initial
begin
time_in[0]<=32'd2000000000; //40 sec delay
time_in[1]<=32'd200000000; //also 40 sec delay but if I use this alone in one 'if' instead of five, it gives 8 seconds.
time_in[2]<=32'd9000000000; //40 sec delay
time_in[3]<=32'd200000000; //40 sec delay
time_in[4]<=32'd2000000000; //40 sec delay
pin1 <= 1; //I tried giving these two to pulse register alternately but LED turns ON once and then stays ON. 
pin0 <= 0;
end

always @(posedge clock)
begin
//five nested if else below
if(countPulse1 == FIRST_DIVIDER)
begin
countPulse1 <= 1'b0;
pulse <= ~pulse; //Tried to give 1'b1 here didnt work and LED never turned ON. Tried pin1 from above. 
//That turned it ON but kept it ON without turning OFF in code below  
if(countPulse2 == SECOND_DIVIDER)
begin
countPulse2 <= 1'b0; //Tried to give 1'b0 here but LED never turned ON to begin with. Tried pin0 but it didnt go OFF.
pulse <= ~pulse;
if(countPulse3 == THIRD_DIVIDER) //used time_in[0], time_in[1] etc here to achieve delay of 40 sec but it follows a 40sec ON, 40 sec //OFF cycle instead of 40sec ON, 8 sec OFF, 40 sec ON.
begin
countPulse3 <= 1'b0;
pulse <= ~pulse;
if(countPulse4 == FOURTH_DIVIDER)
begin
countPulse4 <= 1'b0;
pulse <= ~pulse; //I removed all pulse <= ~pulse from above ifs and used only this but LED never turned ON
if(countPulse5 == FIFTH_DIVIDER)
begin
countPulse5 <= 1'b0;
pulse <= ~pulse;
end
else
begin
countPulse5 <= countPulse5 + 1'b1;
end

end
else
begin
countPulse4 <= countPulse4 + 1'b1;
end

end
else
begin
countPulse3 <= countPulse3 + 1'b1;
end

end
else
begin
countPulse2 <= countPulse2 + 1'b1;
end

end
else 
begin
countPulse1 <= countPulse1 + 1'b1;
end



LED_test <= pulse;
end
//rest of the code
endmodule

Forget hours long delay I cant even generate anything beyond 40 second and that too improperly. If anyone could guide me.

In reply to Dev_Engine:

We don’t know what your clock period is, so we don’t know if any of your numbers are correct.

But in any case, your basic problem is you are trying to store numbers that are bigger than 32-bits in a 32-bit variable. 32’d9000000000 is 34’h218711A00.

If you want a parameter larger than 32 bits, you need to explicitly size the number.

Thank you Dave for your reply. Clock frequency is 250MHz.
I used various values for the registers and in the last check I had 255 bit instead of 32 for time_in (i.e. reg [255:0] time_in [N-1:0] ,where N = 5). Now putting the first delay to 255’d20000000000 gave me a 400 second delay. I used smaller values too such as 32’d200000000 which reduces the delay but i still do not get different delays in each if statement.

In reply to Dev_Engine:

I am now using these as delays:


time_in[0]<=255'd2000000;  
time_in[1]<=255'd99999900000999999; 
time_in[2]<=255'd90000000; 
time_in[3]<=255'd999099000; 
time_in[4]<=255'd20000000;

Turns out only the first one i.e. time_in[0] in first if statement works and controls the pulse delay. Rest are useless as I change their values and nothing changes to LED behavior. I will try with a register whose value I read in another always loop with a case.

The reason why only the first delay was implemented was because the rest of the smaller delays kept running on and on multiple times till the first delay was matched. So i put a register count_ONCE in there and made the else conditional on it being zero. When smaller delays completed one loop they incremented this register and so the else is entered just once.
Works perfectly.