Logic to not roll-over

SystemVerilog
,
1

When I verify the counter…

I want to check the counter which should not roll over after 0xFFFF.

John

2

Let say i have counter which increments 16 bits. It can max increment its highest value of 0xFFFF.

I need to verify the counter.

In my checker, bit [15:0] check_counter;

check_counter = prog_counter + increment_value;

assert (counter != check_counter);

Problem: check_counter itself rolls over. So we could not able to verify the counter which should not rolls over.

3

I think I went mad…

Simple.

bit [16:0] check_counter;

check_counter = prog_counter + increment_value;

assert (counter != (check_counter >= 32’hFFFF_FFFF ? 32’hFFFF_FFFF : check_counter);

John