Hi All,
Is it possible to write logic (FIFOs, etc) inside of SystemVerilog Interfaces?
Could a logic be written inside of modports?
Thank you!
Hi All,
Is it possible to write logic (FIFOs, etc) inside of SystemVerilog Interfaces?
Could a logic be written inside of modports?
Thank you!
In reply to ldm_as:
Hi All,
Is it possible to write logic (FIFOs, etc) inside of SystemVerilog Interfaces?
Could a logic be written inside of modports?
The items that can be described inside in a SystemVerilog interface or in modports are well defined in 1800’2017. The real question is not what is “possible”, as SystemVerilog can be too flexible, but rather how is it best to use those items.
Ben Cohen
http://www.systemverilog.us/ ben@systemverilog.us
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