Is it possible to constraint onehotencoding without using any special functions?

SystemVerilog
1

Hi,

Is it possible to constraint onehotencoding without using any special functions?

Thanks in advance.

2

In reply to sk7799:

What do you want to do? A revi:

  1. $onehot(expression) returns `true (bit 1’b1) if only one bit of the expression is high.
  2. $onehot0(expression) returns `true (bit 1’b1) if at most one bit of the expression is high. This is equivalent to $onehot(expression) || expression==0 3
3

I think this is what you are looking for .

4

In reply to MP:

Thankyou MP.

5

In reply to ben@SystemVerilog.us:

Hi Ben, I want to do both onehot and onehot0