Including multiple test cases

SystemVerilog
,
1

I have an array which has the test cases to be fires. and i need to run the SystemVerilog code using command line.
verilog_sub -v 15.22-005 -64 -type linux -vm -nopop -Is -vvip ./run_compile sim $arr(0) random $arr(1) $arr(2) …and so on

./run_compile is an executable file
arr has a list of test cases.
Please guide me through this. I would be very thankful for the same.

2

In reply to Karan K:

This forum is not for tool related issues. You will need to contact your tool support team for additional assistance.