Implement CAM and TCAM using SystemVerilog

SystemVerilog
1

Any ideas on how to implement CAM and TCAM using SystemVerilog?

I understand CAM can be implemented using associative arrays, and data can be used as an index to find the address location.

2

In reply to n347:

You can use the find_index() method. See section 7.12.1 Array locator methods in the IEEE 1800-2017 SystemVerilog LRM. For a TCAM, see 11.4.6 Wildcard equality operators to implement the ternary search.

3

In reply to dave_59:

Thanks Dave!

Anyone has examples of the TCAM Behavioural model?

4

In reply to n347:

module top;
  bit [7:0] array[] = {'hF7,'hE6,'hE5,'hF4,'h03,'hE2,'hF1,'hE0};
  int found[$];
  initial begin
    found = array.find_index() with (item ==? 'hE?);
    foreach (found[index]) $display("array[%0d] = %h",found[index],array[found[index]]);
  end
endmodul

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