How to write assertions for clock frequencies

SystemVerilog
,
1

How to write assertions to clock frequencies of 1Ghz, 333Mhz, 250Mhz

im new to it, if anyone can help me on writing assertion for the mentioned clock frequencies.
thanks in advance.

2

In reply to Kirankumar V Hiremath:

This question was asked many times. You’ll find many results if you use a search.

Here is a link to one of them
https://verificationacademy.com/forums/systemverilog/checking-clock-period-using-system-verilog-assertion
Use realtime and $realtime instead of time and $time.
Adjust the period as needed.
Ben Cohen
http://www.systemverilog.us/ ben@systemverilog.us
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