How to use generate block

Hi,

I am having WPSb signal, i need to shift the signal N number of times using generate block.

Thanks,
Lakshman P

In reply to Lakshman07:

We don’t know what a WPSB is. Same thing for “shift the signal”. Shift relative to what? And why do you think a generate block is needed?

Hi Dave,

WPSb is a signal continuously coming from test bench and at the same time getting parameter value. Based on parameter value, I need to shift the signal.

ex:- parameter=4
WPSb_0 <= WPSb;
WPSb_1<= WPSb_0;
WPSb_2<=WPSb_1;
WPSb_3 <= WPSb_2;
The above one is sample example & for 100 times means code will be lengthy. So i want to use generate block to generate that many shift registers

In reply to Lakshman07:

OK, now we know the signal name is irrelevant, and you want to shift by N clock cycles. You don’t need a generate fore that.

module shifter #(int N) (input logic clk, in output logic out);
  logic [0:N-1] shiftreg;
  always @(posedge clk) shiftreg <= {shiftreg,in};
  assign out = shiftreg[0];
endmodule

Thanks Dave for answering the question.

I am having one more doubt, if my WPSb signal is 21 bit means then the above one is not working. can you tell me how to do

In reply to Lakshman07:

Oh, some more information. :person_facepalming:

module shifter #(int N) (input logic clk, 
                         input logic [20:0] in, 
                         output logic [20:0] out);
  logic [20:0] shiftreg[N];
  always @(posedge clk) shiftreg <= {shiftreg[1:N-1],in};
  assign out = shiftreg[0];
endmodule

Thanks dave_59

The above information helps me a lot