How to randomize bit array to have one bit high at a time

Hi,

If I have an arbiter that has a 16 bit valid input for 16 clients, How do I randomize such that only one bit is high at a time? This is not a system requirement, I just want a test that does this. I haven’t attempted this with a compiler but I was thinking:

class transaction;
  bit [15:0] req_valid;
  constraint req_order;
endclass

typedef enum{one = 16'h1, two = 16'h2, three = 16'h4,...., 16'h8000} Inputs;
program test(intf interface);
   environment env;
   Inputs oneHigh;
   initial begin
   env = new();
   constraint transaction:: req_order {req_valid inside {oneHigh};
endprogram

Will this work? Any better ideas? What if I want to request to also go in a particular order from the enum?

In reply to Pooja Pathak:

$onehot(expression) returns `true (bit 1’b1) if only one bit of the expression is high.
constraint transaction:: req_order {$onehot(req_valid)};
Ben Cohen
http://www.systemverilog.us/ ben@systemverilog.us
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See Paper: 1) VF Horizons:PAPER: SVA Alternative for Complex Assertions | Verification Academy
2) http://systemverilog.us/vf/SolvingComplexUsersAssertions.pdf

In reply to ben@SystemVerilog.us:

Thanks! I didn’t realize we could use those built in function in the constraints.


class transaction;
  rand bit [15:0] req_valid;  
  constraint req_order {
    $countones(req_valid)==1;
  }  
endclass