How to pass a variable to $system function in system verilog

SystemVerilog
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1

I am trying to use $system function to save some information to a file in system verilog. I am able to write to the file if I pass a everything in quotes including command, information and filename.
Like this: void’($system(“echo SIMSTART >> tc_status”)); This way it is writing SIMSTART to file tc_status. But I want to save name of the testcase to the file. The name of testcase is in a variable tc_name. How shall if pass this variable to $system function so that it will append to tc_status.
I tried these methods, but didn’t work:

  1. void’($system({"echo “,tc_name, " >> tc_status”}));
  2. void’($system($sformatf(“echo %s >> tc_status”,tc_name)));
    And 3 to 4 more variations but none of them worked for me. These are not throwing any error, but simply not writing to the file.

Please help.

2

In reply to anand.yadav:

If tc_name is declared as a string, this should have worked. If it is not, you may need to cast it to a string to remove \0 characters.

It might help to put the argument to $system into a separate string variable first and display it to make sure it is being formatted correctly.