//base class as given in the question
class axi_transaction;
typedef enum {WRITE=0, READ=1} rw_e;
rand rw_e rw;
rand bit [31:0] addr, data;
endclass:axi_transaction
//derived class as asked in question
class axi_wr_rd_transaction #(int REPEAT_COUNT=50) extends axi_transaction;
//variable declared to control randomization of rw signal
bit rw_temp;
//variable to monitor loop count for easiness to debug in log file
static int count;
//constraint declaration, will assign value to rw opposite according to rw_temp
constraint limit{if(rw_temp==1) rw==0; else rw==1;}
//pre randomize method to control randomization of addr and data variables according to rw_temp variable
function void pre_randomize();
if(rw_temp==0)
begin
addr.rand_mode(1);
data.rand_mode(1);
end
else
begin
addr.rand_mode(0);
data.rand_mode(0);
end
$write(“Sr.no.=%0d \t rw=%s \t”,++count,rw.name);
endfunction:pre_randomize
//post randomization mathod , will assign rw value to rw_temp variable and display the addr and data.
function void post_randomize();
rw_temp=rw;
$display(" addr=%0d \t data=%0d",addr,data);
//rw.rand_mode(1);
endfunction:post_randomize
//method to generate REPEAT_COUNT number of randomized transaction
function void random(axi_wr_rd_transaction handle);
repeat(REPEAT_COUNT)
begin
void’(handle.randomize());
end
endfunction:random
endclass:axi_wr_rd_transaction
//module declaration
module ei_sv_crv_assign_3_ex_2;
//class instance and handle creation
axi_wr_rd_transaction #(10) axi_tran=new();
initial
begin
$display(“*************************** SIMULATION STARTED “);
void’(axi_tran.random(axi_tran));
$display(”*** SIMULATION ENDED ************************”);
end
endmodule
for the above code , when I passed the parameter value as ‘10’, I am getting below error. help me to solve the problem. I have seen a similar kind of question in this forum but I couldn’t understand the solution.
ERROR:
ncelab: *W, DSEMEL: This SystemVerilog design will be simulated as per IEEE 1800-2009 SystemVerilog simulation semantics. Use -disable_sem2009 option for turning off SV 2009 simulation semantics.
void’(axi_tran.random(axi_tran));
|
ncelab: *E,TYCMPAT (./testbench.sv,64|35): formal and actual do not have assignment compatible data types (expecting datatype compatible with ‘class $unit::axi_wr_rd_transaction#(.REPEAT_COUNT(50))’ but found ‘class $unit::axi_wr_rd_transaction#(.REPEAT_COUNT(10))’ instead).