I’ve created a task in my testbench which takes 3 inputs, but it seems that the value of one of them is wrong.
Below there is my code. I already know that ‘s’ has the same value of ‘dut.r.f’, but when I run the simulation it’s not like this.
MAIN:
module main(
input logic clk,
input logic vaux2_p,
input logic vaux2_n,
output logic gpio1,
);
logic [8:0] f;
inst r(
.clk (clk),
.f (f),
);
endmodule
R:
module inst(
input logic clk,
output logic [ 8:0] f
);
always_ff @(posedge clk) begin
f <= 8'h0_F0;
end
endmodule
TESTBENCH:
module m();
logic clk;
logic vaux2_p;
logic vaux2_n;
logic gpio1;
main dut(
.clk(clk),
.vaux12_p (vaux2_p),
.vaux12_n (vaux2_n),
.gpio1 (gpio1)
);
task test;
input [ 7:0] a;
input [8:0] v;
input [8:0] s;
integer f1;
begin
f1 = $fopen("file.txt","w");
if (!f1) begin
$display("File \"file.txt\" cannot be opened!");
end else begin
//this part of code is just for test what I'm reading
$fdisplay(f1," f: %0h %0b %0d", dut.r.f,dut.r.f,dut.r.f);
$fdisplay(f1,"s: %0h %0b %0d", s,s,s);
$fdisplay(f1,"v: %0h %0b %0d", v,v,v);
$fclose(f1);
end
endtask
initial begin
test(8'h19,24'hFF00, dut.r.f);
$finish;
end
endmodule
If I run this code and then I open the file.txt what I can read is this:
f: f0 11110000 240
s: xxxxxx xxxxxxxxxxxxxxxxxxxxxxxx x
v: f0 11110000 240
I was thinking that this can be due to the fact that at the beginning of the simulation ‘dut.r.f=xxxxxx’ and only after few ns it turns in f0, but then I realized that this cannot be the problem for two reasons: the first one is that if the value of the signals is taken at the beginning of the simulation, also ‘f’ should be equal to xxxxxx, the second one is that even if I introduce a delay before I display the signal values, the problem still exists. Do you know if there is any issue in passing a variable from main as input for the task? If yes, it’s the same also with functions? Can anyone kindly help me, please? Thanks!