How to generate exactly 109.375 Ghz clock?

SystemVerilog
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1

Hi,
I want to generate exactly 109.375 Ghz clock. Is there any way to do so(even in normal verilog would be fine). The issue is mainly about the time precision where we can go lowest till 1fs(which is 0.001ps). One way I thought was generating 875 Ghz clock and then dividing it by 8 using counter(so that we get 875/8 = 109.375) . But even 875 Ghz is also not possible due to time precision issue. Can anyone please help me on this. This is urgent and important.

thanks,
suyog

2

In reply to suyog.marvell:

You cannot do this simply because not all decimal fractions can be represented in binary.

You should not be relying on Verilog/SystemVerilog simulation for super accurate timing analysis. Just make sure all your clocks have the needed relative relationships and you can clock cycles to the needed period for reporting.