How to connect interface to internal signals of a module?

SystemVerilog
1

I’m working on a monitor and I would like to connect the interface that the monitor is using to the internal signals of a module. What’s the best way to do that in SystemVerilog?

An example is below (not real code). In the example, how do I connect a and b of the interface to a and b of the dut module.

interface dut_internal_if;
  logic a;
  logic b;
endinterface: dut_internal_if

module dut(
           output logic clock_out,
           input logic data_in,
           output logic out);
  reg                  a;
  reg                  b;
  
  always begin
    #5 clock_out = ~clock_out;
  end

  always @(posedge clock_out) begin
    a <= ~data_in;
    b <= data_in;
  end

  always begin
    out = a ^ b;
  end;
    
endmodule: dut

module test;
  // connect here
endmodule
2

You use the bind construct and make the interface signals ports instead of internal to the interface.

interface dut_internal_if(
input  logic X,
  logic Y
);
endinterface: dut_internal_if

module test;

dut dut_iii(...);

bind dut:dut_iii dut_internal_if if_iii (.X(a),.Y(b));

endmodule

See my DVCon paper for a complete example.

3

In reply to dave_59:

This post is old now, but I’m needing to do this and am hoping someone is still around to help me. In the example, I don’t see the monitor code, if it’s there. I’m treating if_iii as an instance of the interface and hooking it up to my monitor block, but it’s returning the error “An interface declaration must be connected to an interface”. So apparently it’s not behaving as I think it should. What is if_iii?

4

In reply to opwon12:

if_iii is the name of the instance created by the **bind** statement. Its full pathname would be test.dut_iii.if_iii.

The DVCon paper shows a very small example with only a driver. A monitor would work the exact same way.

5

In reply to dave_59:

Dave, you said that the interface signals would have to be declared as ports. Would a modport work instead?

interface dut_internal_if;
  logic a;
  logic b;

  modport dut_mp (
    input  a,
    input  b
  );
endinterface: dut_internal_if

bind dut:dut_iii dut_internal_if.dut_mp if_iii (.a(a),.b(b));
6

In reply to nickcollins:

No, you can only references modports in the port that is an interface.

7

In reply to dave_59:

Then what is alternative to work with the modport?

8

In reply to Vaishali:

It is best if you started another thread with a new question. The original question is very old and did not involve modports.