Is there a posibility to make synteziable hierarchy of constants in SV?
For example there is a board with FPGA and several peripheral ICs. Each IC have some setting registers. Each setting register have a number of parts. And each part have some posible values.
Is it posible to get this values with somelike this DEV.REG.PART.VAL (not a DEV_REG_PART_VAL)?
Structs are not so exelent for making this hierarchy because of names intersection.
For example there is a USB IC and a stepper-motor IC on a board. A USB IC has a register SPEED with posible values LOW, HIGH and FULL. Stepper-motor IC also has a register SPEED with values 1RPM, 10RPM and 100RPM.
I would like to use a hierarchy like folders in file system where I can create two different folders with same names and it is valid for all cases except “two identical names in one parent folder” (even same names parent and child folders).
It will be very usefull with an autocomplete. Otherwise refixes DEV_REG_PART_… fills up all context menu.
Can I do somelike that?