Hi,
I need to generate reads and writes in a sequence. The number of reads and writes are fixed values, decided based on the test. Lets call them num_rd, num_wr.
I need to randomly choose whether I want to send a read or write.
For this I am using a 1bit variable "m_send_read".
The code looks like:
for (int i = 0; i < num_rd + num_wr; i++) begin
if (!randomize(m_send_read)
`uvm_fatal(get_name(), "Failed to randomize m_send_read")
if (m_send_read)
send_read_txn();
else
send_write_txn();
endFor m_send_read, I am writing the below constraint:
constraint c_send_read {
m_send_read dist {1 := num_rd, 0 := num_wr};
}
The problem is that with the above constraint, I will not get exact numbers of read and writes.
For eg, If I need to send 100 read and 500 writes, I get something like 97 reads and 503 write.
Is there a way to get fixed number of transactions randomly distribute?
