hi,
i am using systemverilog basic.i used polymorphism basic method to generate read and write call any one method of write or read.i get the error.can u pls clear this error.
module fifo_tb_top();
import fifo_class_pkg::*;
fifo fi;
//fifo_if1 fifo_1;
//fifo_if2 fifo_2;
mailbox mbx=new();
initial begin
int i;
/*fi=new();
fifo_1=new();
fifo_2=new();*/
//fi.fifo_1.mb=mbx;
//fi.fifo_2.mb=mbx;
fi=new();
//fifo_1=new();
//fifo_2=new();
fi=fifo_1;//fifo_1=fi;
fi=fifo_2;//=fi;
fi.create();
fi.start();
for(i=0;i<10;i++)
if(fifo_1.randomize())begin
fi.write();
//fifo_1.write();
mbx.put(fifo_1);
$display("\t put write_data=%d",fifo_if);
while(1) begin
#10ns;
mbx.get(fifo_1);
$display("\t get write_data=%d",fifo_if);
end
end
//fi.read();
for(i=0;i<10;i++)
if(fifo_2.randomize())begin
fi.read();
//fifo_2.read();
mbx.put(fifo_2);
$display("\t put read_data=%d",fifo_if);
while(1) begin
//#10ns;
mbx.get(fifo_2);
$display("\t get read_data=%d",fifo_if);
end
end
end
endmodule
--------------------------------------------------
class fifo;
fifo_if1 fifo_1;
fifo_if2 fifo_2;
function new();
endfunction
task create();
fifo_1=new();
fifo_2=new();
endtask
virtual task start();
fork
begin
fifo_1.write();
fifo_2.read();
end
join
endtask
endclass
--------------------------------------------------
class fifo_if1;
rand bit write[10];
//mailbox #()mb;
function new();
endfunction
/*task write();
begin
//int i;
//for(i=0;i<10;i++)
//if(fifo_1.randomize())begin
//end
end
endtask*/
endclass
--------------------------------------------------
class fifo_if2;
rand bit read[10];
//mailbox #()mb;
function new();
endfunction
/*task read();
begin
//int i;
//for(i=0;i<10;i++)
//if(fifo_2.randomize())begin
//end
end
endtask*/
endclass
-----------------------------------------------------
package fifo_class_pkg;
`include "fifo_if2.sv"
`include "fifo_if1.sv"
`include "fifo.sv"
endpackage
-------------------------------------------------------
i got the error:
undefined variable:fifo_1;
undefined variable:fifo_2;