FILE HANDLING IN SV

SystemVerilog
,
1

Hello,

I want to read a file line by line in systemverilog. And also split those lines based on delimiters.I know how to do in python , but I have to use SV for this case.

For example my file can contain : -
11C 1
8802010 2
8802020 3
8802030 4
8 5

OR

'h11C 1
8802010 2
8802020 , 3
8802030 : 4
8 5

I tried the following : -

file_addr_data = $fopen("addr_data_file","r");
      $display("file_addr_data=%h",file_addr_data);
      while (!$feof(file_addr_data)) begin
        $fscanf(file_addr_data,"%h %h \n",addr,data);
        $display("addr  %0h data %0h",addr,data);                         
      end
      $fclose(file_addr_data);

But this do not works for the second case , and it goes to infinite loop with following message : -

addr 0 data 0
addr 0 data 0
addr 0 data 0
addr 0 data 0
addr 0 data 0
…

Is there any way to do it ?

Thanks.

2

In reply to pk_94:

You need to check the return value from $fscanf and break out of the loop if is does not return 2. (look at the LRM)

I think the easiest thing to do is write a Python script that converts your file to some that is easy for $fscanf to read.