Driver ,Interface connection to RTL Strange Error

Hi All,

I am facing a strange problem ,

Consider There are 3 signals namely addr, data, valid signal which is driven from driver through interface into RTL.

let addr be equal to ={1_fb38,1_fb3a,1_fb3c,1_fb3e,1_fb40 …};
let data be eyal to = {0001_0000,0003_002,0005_0004,0007_0006 …};
and valid always equal to 1’b1;

Problem i am facing when driven to RTL first data and address are skipped and directly starts from second address and data i.e. Data directly starts from 0003_0002 and addr starts from 1_fb3a . 0001_0000 data and 1_fb38 address is skipped.

Driver code is something like this,

for(i=0,i<=no_of_data;i++) begin
//if i put display statement here i get 0001_0000 data and time stamp in log file.
_if.cbmas.addr <= addr;
_if.cbmas.data <= data;
_if.cbmas.valid <= valid;

@(_if.cbmas);

end

Here _if is the interface object and cbmas is clocking block. clocking block has default input 0.1ns and default output has 0.2ns.

in top.sv

module top()

interface if1(clk);

intial begin

force RTL.clk = clk;
force RTL.addr = if1.addr;
force RTL.data = if1.data;
force RTL.valid = if1.valid;

end

endmodule

Please let me know if anyone has faced such type of error and how to solve this error .

Thanks & regards
rhegde

In reply to raku:

Not nearly enough code shown to help you. You might want to work with your local AE support staff where you can share more code with them.

In reply to dave_59:

Thanks Dave,

I have solved the above problem. Above problem was due to Below text in the System Verilog LRM.

It is possible for a drive statement to execute at a time that is not coincident with its clocking event. Such drive
statements shall execute without blocking, but shall perform their drive action as if they had executed at the time of
the next clocking event. The expression on the right-hand side of the drive statement shall be evaluated immediately,
but the processing of the drive is delayed until the time of the next clocking event

Since in my testcase there was lot of other interface . so before driving to this interface i was delaying driving to this interface by some other interface clk i.e repeat(10) @(posedge other_interface.clk);

This caused the above problem now by shifting @(_if.cbmas) at top of the for loop error is solved.

One more thing Dave i would like to know is there any other similar kinds of Error caused because of above statements of LRM. if yes Please share it would really helpful.

Thanks
Rhegde