Disconnect the RTL driver during simualtion

SystemVerilog
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1

Is it possible to disconnect an RTL block during simulation?

Please refer the diagram via the below link:

As depicted, the DUT interface is driven by 2 blocks:

  1. UVM spi agent (driver) and
  2. RTL spi Driver

The spi interface needs to be driven either by RTL spi driver OR UVM spi driver

Traditional Approach:
I can use an `ifdef to prevent the instantiation of the RTL spi driver block so that the interface is driven only by the UVM driver.
The problem with this approach is when a test fails with uvm spi driver and if I need to use the RTL spi driver, I need to re-compile.

Recompiling will not guarantee the reproduction of the scenario (randomization) even if we use the seed number.

Requirement:
It’ll be great to compile the RTL spi driver.
Then control the driving of the spi interface either from the UVM driver or RTL driver based on the simulation directive. This way I can use any driver, without having to recompile.

Could you please guide me in this regard?

Thank you,
Muneeb Ulla Shariff

2

In reply to muneebullashariff:

You need to explain further how the two different drivers are expected to drive the same stimulus. If the stimulus of both are generated from the same uvm_sequences, there should be no issues with random stability when re-compiling RTL.

At a minimum, you can put a wrapper around your RTL driver that inserts tr-state buffers to disconnect the outputs.