Difference between $init_signal_spy() and force?

Could someone provide the difference between the two, $init_signal_spy() and force keywords. When is it better to use one or the other?

In reply to GCHAN310:
Neither. They are best used for debugging. But sometimes they are unavoidable if you need to reset some logic to get your simulation out of the X state and cannot add reset to the actual hardware.

force is a SystemVerilog statement and will work on any simulator. $init_signal_spy() is simulator specific and you will need to look at the detail in your Vendor’s User Manual.

Another benefit of using force is in the optimization process. Using a systemtask like $init_signal_spy usually involves looking up the signal by a string name and is much slower because it requires preserving a lot of extra information in the simulation.