I’ve googled “ctags for vim” but did not find any obvious answers.
Can anyone recommend a ctags like program for vim?
If not, are other solutions available?
Thanks,
-Mike
Turns out you can customize ctags with a .ctags file. This file can then recognize SystemVerilog content. Since the UVM files are spread all over the place, you need to run ctags recursively at a high enough level directory. Then you need to tell vim where to find the tags file.
Once you have .ctags created (see content below), do this:
% ctags -R # recursively search directories
in vim, specify the tags location (e.g. current dir, current file location, up a dir.):
:set tags=tags=./tags,tags,…/tags
see also (http://kaushalmodi.github.io/2014/03/09/ctags-verilog-and-emacs/)
.ctags content (no way to post files in this forum…?):
–exclude=.SOS
–exclude=.git
–exclude=nobackup
–exclude=nobkp
–langdef=systemverilog
–langmap=systemverilog:.v.vg.sv.svh.tv.vinc
–regex-systemverilog=/^\s*(\b(static|local|virtual|protected)\b)\s\bclass\b\s*(\b\w+\b)/\3/c,class/
–regex-systemverilog=/^\s*(\b(static|local|virtual|protected)\b)\s\btask\b\s*(\b(static|automatic)\b)?\s*(\w+::)?\s*(\b\w+\b)/\6/t,task/
–regex-systemverilog=/^\s*(\b(static|local|virtual|protected)\b)\s\bfunction\b\s*(\b(\w+)\b)?\s*(\w+::)?\s*(\b\w+\b)/\6/f,function/
–regex-systemverilog=/^\s*\bmodule\b\s*(\b\w+\b)/\1/m,module/
–regex-systemverilog=/^\s*\bprogram\b\s*(\b\w+\b)/\1/p,program/
–regex-systemverilog=/^\s*\binterface\b\s*(\b\w+\b)/\1/i,interface/
–regex-systemverilog=/^\s*\btypedef\b\s+.\s+(\b\w+\b)\s;/\1/e,typedef/
–regex-systemverilog=/^\s*define\b\s*(\w+)/\1/d,define/
–regex-systemverilog=/}\s*(\b\w+\b)\s*;/\1/e,typedef/
–regex-systemverilog=/^\s*(\b(static|local|private|rand)\b)\s(\b(shortint|int|longint)\b)\s*(\bunsigned\b)?(\s*[.+])\s(\b\w+\b)/\7/v,variable/
–regex-systemverilog=/^\s*(\b(static|local|private|rand)\b)\s(\b(byte|bit|logic|reg|integer|time)\b)(\s*[.+])\s(\b\w+\b)/\6/v,variable/
–regex-systemverilog=/^\s*(\b(static|local|private)\b)\s(\b(real|shortreal|chandle|string|event)\b)(\s*[.+])\s(\b\w+\b)/\6/v,variable/
–regex-systemverilog=/(\b(input|output|inout)\b)?\s*([.+])\s(\b(wire|reg|logic)\b)\s*([.+])\s(#((.+)|\S+)))?\s*(\b\w+\b)/\9/v,variable/
–regex-systemverilog=/(\b(parameter|localparam)\b).+(\b\w+\b)\s*=/\3/a,parameter/
–systemverilog-kinds=+ctfmpied
–languages=systemverilog,C,C++,HTML,Lisp,Make,Matlab,Perl,Python,Sh,Tex
In reply to mike_bradley63:
Turns out you can customize ctags with a .ctags file. This file can then recognize SystemVerilog content. Since the UVM files are spread all over the place, you need to run ctags recursively at a high enough level directory. Then you need to tell vim where to find the tags file.
Once you have .ctags created (see content below), do this:
% ctags -R # recursively search directories
in vim, specify the tags location (e.g. current dir, current file location, up a dir.):
:set tags=tags=./tags,tags,…/tags
see also (http://kaushalmodi.github.io/2014/03/09/ctags-verilog-and-emacs/)
.ctags content (no way to post files in this forum…?):
–exclude=.SOS
–exclude=.git
–exclude=nobackup
–exclude=nobkp
–langdef=systemverilog
–langmap=systemverilog:.v.vg.sv.svh.tv.vinc
–regex-systemverilog=/^\s*(\b(static|local|virtual|protected)\b)\s\bclass\b\s*(\b\w+\b)/\3/c,class/
–regex-systemverilog=/^\s*(\b(static|local|virtual|protected)\b)\s\btask\b\s*(\b(static|automatic)\b)?\s*(\w+::)?\s*(\b\w+\b)/\6/t,task/
–regex-systemverilog=/^\s*(\b(static|local|virtual|protected)\b)\s\bfunction\b\s*(\b(\w+)\b)?\s*(\w+::)?\s*(\b\w+\b)/\6/f,function/
–regex-systemverilog=/^\s*\bmodule\b\s*(\b\w+\b)/\1/m,module/
–regex-systemverilog=/^\s*\bprogram\b\s*(\b\w+\b)/\1/p,program/
–regex-systemverilog=/^\s*\binterface\b\s*(\b\w+\b)/\1/i,interface/
–regex-systemverilog=/^\s*\btypedef\b\s+.\s+(\b\w+\b)\s;/\1/e,typedef/
–regex-systemverilog=/^\s*define\b\s*(\w+)/\1/d,define/
–regex-systemverilog=/}\s*(\b\w+\b)\s*;/\1/e,typedef/
–regex-systemverilog=/^\s*(\b(static|local|private|rand)\b)\s(\b(shortint|int|longint)\b)\s*(\bunsigned\b)?(\s*[.+])\s(\b\w+\b)/\7/v,variable/
–regex-systemverilog=/^\s*(\b(static|local|private|rand)\b)\s(\b(byte|bit|logic|reg|integer|time)\b)(\s*[.+])\s(\b\w+\b)/\6/v,variable/
–regex-systemverilog=/^\s*(\b(static|local|private)\b)\s(\b(real|shortreal|chandle|string|event)\b)(\s*[.+])\s(\b\w+\b)/\6/v,variable/
–regex-systemverilog=/(\b(input|output|inout)\b)?\s*([.+])\s(\b(wire|reg|logic)\b)\s*([.+])\s(#((.+)|\S+)))?\s*(\b\w+\b)/\9/v,variable/
–regex-systemverilog=/(\b(parameter|localparam)\b).+(\b\w+\b)\s*=/\3/a,parameter/
–systemverilog-kinds=+ctfmpied
–languages=systemverilog,C,C++,HTML,Lisp,Make,Matlab,Perl,Python,Sh,Tex
In above regex `define and for interfaces it is not working. can somebody point me the correct one? For classes it is working fine.
What I did:
I have a define in one file1.sv as define BASE_ADDR in another file2.sv I am using BASE_ADDR
I have kept cursor on `BASE_ADDR and pressed ctrl and ] at same time. it is not pointing me to file1.sv
correct me if I’m doing something wrong.
In reply to Abuzar Gaffari:
For jumping defines, I have added the below line in my .vimrc file
set iskeyword+=`
It is working now.