Compare 2 Queues, 2 Associative arrays, 2 Dynamic Arrays

SystemVerilog
1

Hello,
Is there a simple way to compare 2 Queues, 2 Associative arrays, 2 Dynamic Arrays

For eg: input_queue[] , output_queue[]
Is there some built in method like compare ( input_queue[], output_queue[] ) which give 1 if match
and give 0 if different.
Do we need to implement a task and pop each input_queue and output_queue elements
one by one and compare.

Similarly for Associative array int input_assoc_array[int] int output_assoc_array[int]
Is there a built in method to compare two associative arrays to see if they match

Thanks
JeffD

2

In reply to dvuvmsv:

Yes, it’s called the equality operator: (q1 == q2)

3

Thank you Dave
JeffD

4

In reply to dave_59:

How can we compare two queues different elements on each clock :
like
typedef struct{
bit[31:0] addr_1;
bit enable_1
} seq_item_1

typedef struct{
bit[31:0] addr_2;
bit enable_2;
} seq_item_2

Now i want to compare addr_1 with addr_2 and enable_1 with enable_2 . How can i do it . Please guide me

5

In reply to Himanshu m soni:

You can use the reduction and method, but you need to manually write the equation that compares each element.

seq_item_1 q1[$];
seq_item_2 q2[$];

if ( q1.size == q2.size && 
     q1.and(i1) with (i1.addr_1 == q2[i1.index].addr_2 && i1.enable_1 == q2[i1.index].enable_2) )
  $display("q1 == q2");
else
  $display("q1 != q2");
6

Hi Dave,

When both struct are same then also the output is q1 != q2.
Can you please let me know the reason.

Thanks,

7

In reply to UVM_geek:

Because the code does not take care of the case when both queues are empty. Add the following before you compare the queues.

 q1.push_back(pkt1);
 q2.push_back(pkt2);
8

Thank you Dave