Hi,
I have a DUT port which is driving X on its output port. This is causing some of my TB state to go X. So i have written following code to change this X to 0. But its is not working as expected.
//inp is the input port of this module.
assign inp = (inp === 1'bx)? 1'b0: inp;
This code is adding additional X’s to the inp signal. Can someone tell me whether i can do this without even adding any new port?
Thanks,
Naven
Your code doesn’t work because among other things, it just adds another driver to imp and does not get rid of of DUT driving the X.
The easiest thing to do if you do not want your testbench state to go to X is to use 2-state variables like bit and int instead of logic and integer.
There are other ways of structuring your testbench to be X tolerant like using the === operator andcase inside statement. But we would need to see more code.
In reply to dave_59:
Thanks Dave,
Can you explain me how scheduling works for situations like this. I am not able to visualize this.
Ones again thank you for your help.
In reply to Naven8:
Assuming the DUT is driving X on the wire inp, your continuous assignment (assuming it works the way you want it to) will try to drive a 0 on the same wire. Now you have 2 drivers on inp; your DUT driving an X and the TB driving a 0. That will resolve to an X
Then let’s say you modify your DUT to reduce the driver’s strength to a pull. the the TB assign should override the DUT. However, the TB will only drive a 0 while inp is X and as imp goes to 0, it stops driving the 0, and will drive the previous value of imp, which is 0. Since that is a strong 0, it will override whatever the DUT is driving and inp will get stuck at 0.