In reply to Rahulkumar Patel:
Thanks for reply. As per my understanding, there are some flaws in idea of your assertion.
1. $stable(tx_data) should be checked by tx_clk rather than rx_clk, as in case of fast-to-slow CDC, change of tx_data on tx_clk may get missed by slow rx_clk. And I think it's wise to check tx_data stability with respect to tx_clk, as change of tx_data is sensitive to tx_clk.
2. @(posedge tx/rx_clk) $stable(tx_data)[*3] - here, stability is checked for 3 posedge of tx/rx_clk, but the three edge requirement is any edge, pos-neg-pos or neg-pos-neg.
If I think of @(edge rx_clk) for 3 edges of rx_clk, potential issue I see is use of ##1 in writing sequence after it will not help me as ##1 means whole clock period only.
Need to modify assertion for proper solution.