Can we assign struct to logic inside the class?

SystemVerilog
1

I have a question on converting system verilog structure to logic.

For example below is my structure inside a class:

Class...... 
        typedef struct {
             logic  sync_off = {1'b1};
             logic  block_instruction = {1'b0};
             logic  cfg0_0_reg [31:0] =        {0,0,0,0,0,0,1,1,1,1,1,1,0,1,0,0,0,1,1,1,1,1,1,1,1,0,0,0,1,1,0,0};
        } instruction_set; 

        instruction_set in_bypass; 
        logic [$bits(in_bypass)-1:0] input_bypass; 

endclass

I have one task inside the class which takes logic as an input argument.
I would like to pass my structure element there but I dont want to change argument type.
Is there a way where I can assign these structure data to logic. (Assume that all the elements inside the struct is logic)

assign input_bypass = in_bypass;
set_data_l(input_bypass); //Calling the task.

However I cannot make use of assign inside the class.

Please suggest a way…

Thanks in advance
Prashanth

2

In reply to prashanth.billava:
Please use code tags around your code to make it easier to read. I have added them for you.

You can use a bit-stream cast to covert a struct to a packed logic array (vector). You just need a typedef for the target type instead of an intermediate input_bypass variable.

typedef logic [$bits(in_bypass)-1:0] input_bypass_t;
set_data_l(input_bypass_t'(in_bypass)); //Calling the task.

See section 6.24.3 Bit-stream casting in the 1800-2012 LRM for more details.

3

In reply to dave_59:

Hi Dave,
Thanks for the details.
I have tried with the bit-stream casting. I am still seeing some issues.

I have clearly taken care of the syntax after referring to LRM.
I can paste the code in case if you want to take a look.
Note: Total stream in the struct is 1154. The one I mentioned in the above example is just for illustration.

Below is the error message what I am seeing after casting:

1866 Error-[ICTTFC] Incompatible complex type usage
----sequence path here [removed this line ]…
1868 Incompatible complex type usage in task or function call.
1869 The following expression is incompatible with the formal parameter of the
1870 function. The type of the actual is ‘logic[1153:0]’, while the type of the
1871 formal is ‘logic$’. Expression: in_bypass
1872 Source info: this.set_data_l(in_bypass)

After seeing this error message,
I tried casting this outside and passing the casted variable to the task. Something like below and this has resulted in the same issue.

class tap_ovrd; 
...
        typedef struct {
             logic  sync_off = {1'b1};
             logic  block_instruction = {1'b0};
             logic  cfg0_0_reg [31:0] =        {0,0,0,0,0,0,1,1,1,1,1,1,0,1,0,0,0,1,1,1,1,1,1,1,1,0,0,0,1,1,0,0};
        } instruction_set; 
 
        instruction_set in_bypass;

typedef logic [33:0] input_data_stream;
logic [33:0] input_tap_data_stream;
input_tap_data_stream = input_data_stream'(in_bypass);
....
ap_set_dr_l(input_tap_data_stream);
...
endclass: tap_ovrd

Could you help with the way to get rid of this. I dont want to change the task input arguments. I would like to find a way to pass this struct element.

4

In reply to prashanth.billava:

The type that you cast to has to match the data type of the task argument. You have not shown that task declaration.

5

In reply to dave_59:

Hi Dave,

Here is task declaration. There is some underlying infrastructure as well. However when I just pass the logic type it works fine. I am trying to pass the logic type after casting the struct type to logic.

class ap_base_seq;

function void ap_set_dr_l(logic user_val[] = {});
// Ignore tap_set_reserved failed
if(illegal_reserved_opcode) return;

if(user_val.size() > 0) begin
if(user_val.size() < curr_reg.get_size())
`sla_error("ap_set_dr_l", ("%s> User Specified Data Size [%0d] is less than Register Size [%s.%s] = [%0d]", env_mode, user_val.size(), 
curr_tap.get_name(), curr_reg.get_name(),curr_reg.get_size()));

curr_reg.tap_tdi_data = new[curr_reg.get_size()](user_val);
end
else begin
gen_data("RAND", curr_reg.tap_tdi_data);
end
curr_reg.set_sliced_mode(0);
endfunction

endclass:ap_base_seq
6

In reply to prashanth.billava:

The type that you cast to has to match the data type of the function argument.
Now that you’ve shown me the function declaration, I see that the data type is an dynamic array of logic. That’s what you need to make the cast.

typedef logic input_data_stream_t[];

....
ap_set_dr_l(input_data_stream_t'(in_bypass));
7

In reply to dave_59:

Thanks Dave. It helped a lot to optimize my code.