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  • Attempt to schedule an event at time that exceeds the maximum simulation timestep - 9223372054247326807

Attempt to schedule an event at time that exceeds the maximum simulation timestep - 9223372054247326807

SystemVerilog 6318
CRVAddict
CRVAddict
Full Access
28 posts
August 10, 2020 at 8:26 pm

Not Sure if this is the right forum to ask, I am getting the following error. Any ideas why?
timestep iam assuming is equivalent to timeprecision?

Attempt to schedule an event at time that exceeds the maximum simulation timestep - 9223372054247326807

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dave_59
dave_59
Forum Moderator
10661 posts
August 11, 2020 at 7:59 am

In reply to CRVAddict:

That's the largest value for a 64 bit positive number which is used to represent time in whatever precision. Most likely you have a math error in one of your delay calculations. Was there any other message that came just before this? Did it point to a specific line of code?

— Dave Rich, Verification Architect, Siemens EDA

CRVAddict
CRVAddict
Full Access
28 posts
August 11, 2020 at 8:38 am

Did not give a line number just pointed to the model. Which is what made it hard

# ** Error (suppressible): (vsim-8890) Attempt to schedule an event at time that exceeds the maximum simulation timestep - 9223372048175326807.
# Time: 11320551 ps Iteration: 2 Instance: /tb_top/ddr4_sim/ddr_mem_gen[0]/gen_ddr4_model_8gb_x8_083E/ddr4_mem

In reply to dave_59:

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