when i m running below codes , Code 1 not getting error ,code 2 syntax error is comming in second always block ,Pls help me
Code 1****
module test;
bit clock;
always #5 clock = ~clock;
logic a = 1'b0;
logic b = 1'b0;
logic c = 1'b1;
time current_time;
initial begin
$dumpfile("dump.vcd"); $dumpvars;
#10 a = 1'b1;
#10 b = 1'b1;
#10 a = 1'b0;
#10 b = 1'b0;
#10 $finish;
end
ASSERTION1 : assert property ( @(posedge clock )
a -> b )
$display( "Pass 1 %t ",$time);
ASSERTION2 : assert property ( @(posedge clock )
a ##0 b )
$display ("Pass 2 %t",$time);
always @ (posedge clock)
begin
if (c == 1) begin
assertion1 : assert ( a -> b ) begin
$display ("sucess 1");
end else begin
current_time = $time;
#1 $error("failure 1 at time %0t", current_time);
end
end
end
endmodule
Code 2
module test;
bit clock;
always #5 clock = ~clock;
logic a = 1'b0;
logic b = 1'b0;
logic c = 1'b1;
time current_time;
initial begin
$dumpfile("dump.vcd"); $dumpvars;
#10 a = 1'b1;
#10 b = 1'b1;
#10 a = 1'b0;
#10 b = 1'b0;
#10 $finish;
end
ASSERTION1 : assert property ( @(posedge clock )
a -> b )
$display( "Pass 1 %t ",$time);
ASSERTION2 : assert property ( @(posedge clock )
a ##0 b )
$display ("Pass 2 %t",$time);
always @ (posedge clock)
begin
if (c == 1) begin
assertion1 : assert ( a -> b ) begin
$display ("sucess 1");
end else begin
current_time = $time;
#1 $error("failure 1 at time %0t", current_time);
end
end
end
always @ (posedge clock)
begin
if (c == 1) begin
assertion2 : assert ( a ##0 b ) begin. // syntax error here added by moderator
$display ("sucess 2");
end else begin
current_time = $time;
#1 $error("failure 2 at time %0t", current_time);
end
end
end
endmodule