In reply to Nagarjuna Chary:
The following works: AVOID the not opr. Intead check for the positive expected results. Here we're looking that a[*4] occurs no more than once in 20 cycles.
Since the Non-consecutive repetition operator is a Booleaan (Boolean([=n]), we
can use the endpoints instead.
ap_no4a: assert property(@ (posedge clk)
$rose(start) ##4 1 |-> (q_a4.triggered[=1] intersect 1[*20]));
module m;
`include "uvm_macros.svh" import uvm_pkg::*;
bit a, start, clk;
event e;
initial forever #10 clk = !clk;
function void pass_event();
-> e;
endfunction
sequence q_a4;
@(posedge clk) a[*4] ##0 (1, pass_event());
endsequence
ap_no4a: assert property(@ (posedge clk)
$rose(start) ##4 1 |-> (q_a4.triggered[=1] intersect 1[*20]));
initial begin
bit once;
int count;
repeat (200) begin
@(posedge clk) start<=1'b1;
@(posedge clk) start <=1'b0;
if (!randomize(once) with {
// a dist {1'b1 := 4, 1'b0 := 1};
once dist {1'b1 := 1, 1'b0 := 1};
})
`uvm_error("MYERR", "This is a randomize error");
if(once) begin
repeat(6) @(posedge clk);
a <= 1'b1; repeat(4) @(posedge clk);
a <= 1'b0;
end
else // twice
begin
repeat(2) @(posedge clk);
a <= 1'b1; repeat(4) @(posedge clk);
a <= 1'b0;
repeat(2) @(posedge clk);
a <= 1'b1; repeat(4) @(posedge clk);
a <= 1'b0;
end
repeat(20) @(posedge clk);
end
$finish;
end
endmodule
Ben Cohen
http://www.systemverilog.us/
For training, consulting, services: contact
http://cvcblr.com/home.html
** SVA Handbook 4th Edition, 2016 ISBN 978-1518681448
...
1) SVA Package: Dynamic and range delays and repeats
https://rb.gy/a89jlh
2) Free books: Component Design by Example
https://rb.gy/9tcbhl
Real Chip Design and Verification Using Verilog and VHDL($3)
https://rb.gy/cwy7nb
3) Papers:
- Understanding the SVA Engine,
https://verificationacademy.com/verification-horizons/july-2020-volume-16-issue-2
- SVA Alternative for Complex Assertions
https://verificationacademy.com/news/verification-horizons-march-2018-issue
- SVA in a UVM Class-based Environment
https://verificationacademy.com/verification-horizons/february-2013-volume-9-issue-1/SVA-in-a-UVM-Class-based-Environment
