Always block in task

SystemVerilog
1

can i use always block in a task, is it ok for design

2

In reply to saurabhwass:
No. you can not use an always block inside any procedural code, including a task. An always block implements the following two concepts:

  • it creates a process thread by execution of the procedural code within the block.
  • Once the procedural block completes, it repeats execution of the procedural block indefinitely. That process continues until the end of the simulation.

An initial block does only implements the first concept. Once the procedural block completes, that process terminates.

In you need an infinite loop, you can use the procedural forever looping statement. That can be used anywhere a procedural statement is allowed, including inside a task.

3

In reply to dave_59:

Hi Dave,

Still the reasoning behind not using always block in a task in not clear to me.

Essentially forever is also going to execute the statements indefinitely like always block. Then how is it legal to use forever statement but not always in a task.

Thanks
Subramaniam

4

In reply to ssubramaniam:
The short answer is the BNF syntax does not allow it. A task only allows a subset of constructs within it, and always is not part of that set.

There is no need for the always construct in SystemVerilog.

always block_of_statements;

could be written as

initial forever block_of_statements;

and could also be written as

initial while(1) block_of_statements;

and

initial begin
   forever block_of_statements;
  end

You need to realize that the initial construct is not a procedural statement; it is an instantiation of a process, That process begins execution of the procedural statement that followed it.
always is just a shortcut for initial forever that shows the intent better as a process that is always present.

5

In reply to dave_59:

Hi Dave,

I am again asking question related to usage of always/initial block inside a task. So do you mean to say that we can not use always inside a task but we can use initial inside a task ?? Is that what you meant ? Please clarify. Thanks.

Amit

6

In reply to Amit Kumar Mishra:

You need to read the first reply from Dave carefully and also should know what all procedural blocks are available in Verilog/System Verilog. Neither always nor initial are allowed in tasks. They are the blocks where your actual execution of the code takes place.

7

In reply to svats:

Hi Svats,

I read the whole post and then only thought to ask this question. Until now, I also thought that always and initial both can’t be used inside a task. Read Dave’s reply of May 17. It mentions

"You need to realize that the initial construct is not a procedural statement; it is an instantiation of a process, That process begins execution of the procedural statement that followed it.
"

After reading it I had some confusion which I tried to clear.

8

In reply to Amit Kumar Mishra:

The original question was about always blocks. But the answer is the same for initial blocks - the both cannot be used inside a task because they are not procedural statements.

Then another question came up about the procedural forever statement, why was it allowed in a task, but not always. And again I tried to explain the difference between procedural statements and always/initial constructs.

9

In reply to dave_59:

Hi Dave,

Thanks a lot for your response.

10

In reply to dave_59:

Are initial and always block, not procedural statements ?
How do we define procedural statements ?

11

In reply to abajaj:

I believe the last paragraph of my response should answer your question.

12

In reply to dave_59:

hi Dave, i have two query

  1. is forver block and while (1) are identical ?
  2. can i use break or contnue in always block (these are procedural keywords and always block is non procedural so i guess no but need to confirm it )
13

In reply to jignesh.sakariya:

  1. Yes, as well as for(;;), do while(1)
  2. Only in the looping statements in section 12.7
14

Hi Dave,

Can you please let me know if

   forever begin
      repeat(1) @(posedge clk);
      // do stuff here
   end

have the same effect as

always @(posedge clk) begin
   // do stuff here
end

Note the omission of the initial begin end before the forever begin. For further context, my forever statement is in a task main_phase.

15

You need to explain more about what your doubt is. What effect are you looking for? Also note that

repeat(1) statement;

is the same as

statement;
16

I have a counter that increments when a signal is == 1. This signal only toggles on posedge clk.

I have the following code in my module level TB:

always @(posedge clk) begin
   if(a_signal === 1) begin
       count++;
   end
end

I now wish to move this code to my test’s main_phase. Since we cannot use an always block in a task, I did the following:

task main_phase(uvm_phase phase);
   forever begin
      repeat(1) @(posedge clk);
      if(a_signal === 1) begin
         count++;
      end
   end
endtask

So I would like to know if

forever begin
      repeat(1) @(posedge clk);
      // do stuff here
 end

has the same effect as

always @(posedge clk) begin
   // do stuff here
end
17

Basically, the same effect.

Just note that an always block is a process that cannot be killed

The main_phase process gets killed when there are no raised objections.

18

Got it, thank you Dave!