Transaction item get randomized to illegal values at the driver even though the randomization is constrained to fixed value while generating the sequences

OVM
,
1

Hi,

Please someone help me to address this issue,

I have an OVM sequence which get randomized to unintended values although it is constrain to a fixed value using the inline constraints in the ovm_do_with sequence generation macro. I have attached my sequence, virtual sequence, driver code and the simulation transcripts for the issue understanding. The requirement is like the transaction items not be randomized as this is create a unnecessary wiggles on the interface pins

The inline constraints in the sequences are like
ovm_do_with(wr, { wr.data == 'b000000; } ) ovm_do_with(wr, { wr.data == 'b000001; } )
ovm_do_with(wr, { wr.data == 'b000011; } ) ovm_do_with(wr, { wr.data == 'b000111; } )
`ovm_do_with(wr, { wr.data == 'b001111; } )

So these are my interested values that must be generated by the sequence “seq_pwr_start”. Though these values are generated at the expected time I can see some unexpected values before or after the intended values generation

In the driver part of code, where the “req” and “rsp” randomized data samples are received. The “req”, “rsp” should always carry the value that I set in the inline constraints in ovm_do_with macro. But you can see from the simulation transcript(at the end of this message writing) for the $display line
$display(“@%t req.pwr_good-3-2-1-0: %b-%b-%b-%b”, $time, req.pwr_good[3], req.pwr_good[2], req.pwr_good[1], req.pwr_good[0]);

Values given are not the interested ones, but how and why it should generate and how can stop that from generating ?

from simulation transcript

@ 4395610000 req.pwr_good-3-2-1-0: 1-0-1-1 – ININTENDED VALUE

@ 4395610000 rsp.pwr_good-3-2-1-0: 1-0-1-1 – ININTENDED VALUE

@ 4395610000 pgood_int-3-2-1-0: 1-0-1-1 – ININTENDED VALUE

driver part:

virtual protected task get_pgood();
@(posedge di.TI_FPGA_RST_L);
forever begin
@(posedge di.CLK_100M_H)
seq_item_port.get_next_item(req);
$display(“@%t req.pwr_good-3-2-1-0: %b-%b-%b-%b”, $time, req.pwr_good[3], req.pwr_good[2], req.pwr_good[1], req.pwr_good[0]);
$cast(rsp, req.clone());
rsp.set_id_info(req);
$display(“@%t rsp.pwr_good-3-2-1-0: %b-%b-%b-%b”, $time, rsp.pwr_good[3], rsp.pwr_good[2], rsp.pwr_good[1], rsp.pwr_good[0]);
pgood1_int = rsp.pwr_good[0];
pgood2_int = rsp.pwr_good[1];
pgood3_int = rsp.pwr_good[2];
pgood4_int = rsp.pwr_good[3];
di.PGOOD_5V0_COM_H <= rsp.pwr_good[4];
di.TEST_POW_H <= rsp.pwr_good[5];
di.ENA_CONT_PWRUP_H <= rsp.pwr_continue;
ovm_report_info(get_type_name(), $psprintf(“Power Good Access with Data: %h”, rsp.pwr_good), OVM_FULL);
seq_item_port.item_done(rsp);
end
endtask : get_pgood

Here is the sequence where the transaction item is constrained randomized to the fixed values at specific timing intervals

sequence part

virtual task body();
#1
p_sequencer.ovm_report_info(get_type_name(), “", OVM_HIGH);
p_sequencer.ovm_report_info(get_type_name(), $psprintf(“Start PWR UP sequence”), OVM_MEDIUM);
p_sequencer.ovm_report_info(get_type_name(), "”, OVM_HIGH);
ovm_do_with(wr, { wr.data == 'b000000; } ) #30us // 147980000) p_sequencer.ovm_report_info(get_type_name(), "********************************************************", OVM_HIGH); p_sequencer.ovm_report_info(get_type_name(), $psprintf("PGOOG_Step1"), OVM_MEDIUM); p_sequencer.ovm_report_info(get_type_name(), "********************************************************", OVM_HIGH); ovm_do_with(wr, { wr.data == 'b000001; } )
#(147980000ps+30us)
p_sequencer.ovm_report_info(get_type_name(), “", OVM_HIGH);
p_sequencer.ovm_report_info(get_type_name(), $psprintf(“PGOOG_Step2”), OVM_MEDIUM);
p_sequencer.ovm_report_info(get_type_name(), "”, OVM_HIGH);
ovm_do_with(wr, { wr.data == 'b000011; } ) #(147980000ps+147980000ps+30us) p_sequencer.ovm_report_info(get_type_name(), "********************************************************", OVM_HIGH); p_sequencer.ovm_report_info(get_type_name(), $psprintf("PGOOG_Step3"), OVM_MEDIUM); p_sequencer.ovm_report_info(get_type_name(), "********************************************************", OVM_HIGH); ovm_do_with(wr, { wr.data == 'b000111; } )
#(147980000ps+147980000ps+147980000ps+30us)
p_sequencer.ovm_report_info(get_type_name(), “", OVM_HIGH);
p_sequencer.ovm_report_info(get_type_name(), $psprintf(“PGOOG_Step4”), OVM_MEDIUM);
p_sequencer.ovm_report_info(get_type_name(), "”, OVM_HIGH);
ovm_do_with(wr, { wr.data == 'b001111; } ) #30us p_sequencer.ovm_report_info(get_type_name(), "********************************************************", OVM_HIGH); p_sequencer.ovm_report_info(get_type_name(), $psprintf("PGOOG_5V0_COM"), OVM_MEDIUM); p_sequencer.ovm_report_info(get_type_name(), $psprintf("Finished PWR UP sequence"), OVM_MEDIUM); p_sequencer.ovm_report_info(get_type_name(), "********************************************************", OVM_HIGH); ovm_do_with(wr, { wr.data == 'b000000; } )
endtask
endclass : seq_pwr_start

Here I have pasted the complete codes of the sequence , driver , virtual sequence and simulation transcript

SEQUENCE COMPLETE CODE

class pwr_sequencer extends ovm_sequencer #(pwr_transfer);
// Sequencer Id
protected int pwr_id;

ovm_sequencer_utils_begin(pwr_sequencer) ovm_field_int(pwr_id, OVM_ALL_ON)
`ovm_sequencer_utils_end

// new - constructor
function new (string name, ovm_component parent);
super.new(name, parent);
`ovm_update_sequence_lib_and_item(pwr_transfer)
endfunction : new

endclass : pwr_sequencer
//######################################################################################################################
class seq_pwr_write extends ovm_sequence #(pwr_transfer);

function new(string name=“seq_pwr_write”);
super.new(name);
endfunction
`ovm_sequence_utils(seq_pwr_write, pwr_sequencer)
rand bit[5:0] data;
rand bit ctrl;

virtual task body();
ovm_do_with(req, { req.pwr_good == data;} ) ovm_do_with(req, { req.pwr_continue == ctrl;} )
get_response(rsp);
p_sequencer.ovm_report_info(get_type_name(), $psprintf(“Power Good Access with Data: %h”, rsp.pwr_good), OVM_FULL);
endtask
endclass : seq_pwr_write
//######################################################################################################################
class seq_pwr_base extends ovm_sequence #(pwr_transfer);

function new(string name=“seq_pwr_base”);
super.new(name);
endfunction
`ovm_sequence_utils(seq_pwr_base, pwr_sequencer)
seq_pwr_write wr;

virtual task body();
ovm_do_with(wr, { wr.data == 'b011111;} ) ovm_do_with(wr, { wr.ctrl == 'b0;} )
p_sequencer.ovm_report_info(get_type_name(), “", OVM_HIGH);
p_sequencer.ovm_report_info(get_type_name(), $psprintf(“Power Good Access with Data: %h”, wr.data ), OVM_MEDIUM);
p_sequencer.ovm_report_info(get_type_name(), $psprintf(“Power up enable continue with Data: %h”, wr.ctrl ), OVM_MEDIUM);
p_sequencer.ovm_report_info(get_type_name(), "”, OVM_HIGH);
endtask
endclass : seq_pwr_base
//######################################################################################################################
class seq_pwr_start extends seq_pwr_base;

function new(string name=“seq_pwr_start”);
super.new(name);
endfunction
`ovm_sequence_utils(seq_pwr_start, pwr_sequencer)

virtual task body();
#1
p_sequencer.ovm_report_info(get_type_name(), “", OVM_HIGH);
p_sequencer.ovm_report_info(get_type_name(), $psprintf(“Start PWR UP sequence”), OVM_MEDIUM);
p_sequencer.ovm_report_info(get_type_name(), "”, OVM_HIGH);
ovm_do_with(wr, { wr.data == 'b000000; } ) #30us // 147980000) p_sequencer.ovm_report_info(get_type_name(), "********************************************************", OVM_HIGH); p_sequencer.ovm_report_info(get_type_name(), $psprintf("PGOOG_Step1"), OVM_MEDIUM); p_sequencer.ovm_report_info(get_type_name(), "********************************************************", OVM_HIGH); ovm_do_with(wr, { wr.data == 'b000001; } )
#(147980000ps+30us)
p_sequencer.ovm_report_info(get_type_name(), “", OVM_HIGH);
p_sequencer.ovm_report_info(get_type_name(), $psprintf(“PGOOG_Step2”), OVM_MEDIUM);
p_sequencer.ovm_report_info(get_type_name(), "”, OVM_HIGH);
ovm_do_with(wr, { wr.data == 'b000011; } ) #(147980000ps+147980000ps+30us) p_sequencer.ovm_report_info(get_type_name(), "********************************************************", OVM_HIGH); p_sequencer.ovm_report_info(get_type_name(), $psprintf("PGOOG_Step3"), OVM_MEDIUM); p_sequencer.ovm_report_info(get_type_name(), "********************************************************", OVM_HIGH); ovm_do_with(wr, { wr.data == 'b000111; } )
#(147980000ps+147980000ps+147980000ps+30us)
p_sequencer.ovm_report_info(get_type_name(), “", OVM_HIGH);
p_sequencer.ovm_report_info(get_type_name(), $psprintf(“PGOOG_Step4”), OVM_MEDIUM);
p_sequencer.ovm_report_info(get_type_name(), "”, OVM_HIGH);
ovm_do_with(wr, { wr.data == 'b001111; } ) #30us p_sequencer.ovm_report_info(get_type_name(), "********************************************************", OVM_HIGH); p_sequencer.ovm_report_info(get_type_name(), $psprintf("PGOOG_5V0_COM"), OVM_MEDIUM); p_sequencer.ovm_report_info(get_type_name(), $psprintf("Finished PWR UP sequence"), OVM_MEDIUM); p_sequencer.ovm_report_info(get_type_name(), "********************************************************", OVM_HIGH); ovm_do_with(wr, { wr.data == 'b000000; } )
endtask
endclass : seq_pwr_start

DRIVER COMPLETE CODE
--------------------
class pwr_driver extends ovm_driver #(pwr_transfer);

  protected virtual dut_if di;
  protected int pwr_id;
  logic pgood1_int;
  logic pgood2_int;
  logic pgood3_int;
  logic pgood4_int;

  `ovm_component_utils_begin(pwr_driver)
    `ovm_field_int(pwr_id, OVM_ALL_ON)
  `ovm_component_utils_end

  function new (string name, ovm_component parent);
    super.new(name, parent);
  endfunction : new

  function void assign_vi(virtual interface dut_if di);
    this.di = di;
  endfunction : assign_vi

  virtual protected task initial_begin();
     di.TEST_POW_H      <= 'b0;
     di.PGOOD_STEP1_H   <= 'b0;
     di.PGOOD_STEP2_H   <= 'b0;
     di.PGOOD_STEP3_H   <= 'b0;
     di.PGOOD_STEP4_H   <= 'b0;
     di.PGOOD_5V0_COM_H <= 'b0;
     di.ENA_CONT_PWRUP_H <= 'b0;
  endtask : initial_begin

  virtual task run();
    initial_begin();
    fork
      get_pgood();
      drive_pgood();
      reset_signals();
    join
  endtask : run

  virtual protected task get_pgood();
   @(posedge di.TI_FPGA_RST_L);
   forever begin
     @(posedge di.CLK_100M_H)
     seq_item_port.get_next_item(req);
     $display("@%t req.pwr_good-3-2-1-0: %b-%b-%b-%b", $time, req.pwr_good[3], req.pwr_good[2], req.pwr_good[1], req.pwr_good[0]);
     $cast(rsp, req.clone());
     rsp.set_id_info(req);
     $display("@%t rsp.pwr_good-3-2-1-0: %b-%b-%b-%b", $time, rsp.pwr_good[3], rsp.pwr_good[2], rsp.pwr_good[1], rsp.pwr_good[0]);
     pgood1_int   = rsp.pwr_good[0];
     pgood2_int   = rsp.pwr_good[1];
     pgood3_int   = rsp.pwr_good[2];
     pgood4_int   = rsp.pwr_good[3];
     di.PGOOD_5V0_COM_H <= rsp.pwr_good[4];
     di.TEST_POW_H      <= rsp.pwr_good[5];
     di.ENA_CONT_PWRUP_H <= rsp.pwr_continue;
     ovm_report_info(get_type_name(), $psprintf("Power Good Access with Data: %h", rsp.pwr_good), OVM_FULL);
     seq_item_port.item_done(rsp);
    end
  endtask : get_pgood

  virtual protected task drive_pgood();
   @(posedge di.TI_FPGA_RST_L);
   forever begin
     @(pgood1_int, pgood2_int, pgood3_int, pgood4_int, di.ENA_STEP1_H, di.ENA_STEP2_H, di.ENA_STEP3_H, di.ENA_STEP4_H)
     $display("@%t pgood_int-3-2-1-0: %b-%b-%b-%b", $time, pgood4_int, pgood3_int, pgood2_int, pgood1_int);
     if (di.ENA_STEP1_H) di.PGOOD_STEP1_H   <= pgood1_int;
     else di.PGOOD_STEP1_H   <= 1'b0;

     if (di.ENA_STEP2_H) di.PGOOD_STEP2_H   <= pgood2_int;
     else di.PGOOD_STEP2_H   <= 1'b0;

     if (di.ENA_STEP3_H) di.PGOOD_STEP3_H   <= pgood3_int;
     else di.PGOOD_STEP3_H   <= 1'b0;

     if (di.ENA_STEP4_H) di.PGOOD_STEP4_H   <= pgood4_int;
     else di.PGOOD_STEP4_H   <= 1'b0;

    end
  endtask : drive_pgood

  virtual protected task reset_signals();
    forever begin
     @(negedge di.TI_FPGA_RST_L);
     di.PGOOD_STEP1_H   <= 'b0;
     di.PGOOD_STEP2_H   <= 'b0;
     di.PGOOD_STEP3_H   <= 'b0;
     di.PGOOD_STEP4_H   <= 'b0;
     di.PGOOD_5V0_COM_H <= 'b0;
     di.TEST_POW_H      <= 'b0;
     di.ENA_CONT_PWRUP_H <= 'b0;
    end
  endtask : reset_signals

endclass : pwr_driver
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
VIRTUAL SEQUENCER COMPLETE CODE
-------------------------------

class virtual_power_sequence extends virtual_ctrl_sequence;

protected virtual interface dut_if di; 

  function new(string name="virtual_power_sequence");
    super.new(name);
  endfunction

  `ovm_sequence_utils(virtual_power_sequence, virtual_sequencer)
  seq_pwr           s_seq_pwr;
  seq_pwr_start     s_seq_pwr_startup;
  seq_pwr_err1      s_seq_pwr_error1;
  seq_pwr_err2      s_seq_pwr_error2;
  seq_pwr_err3      s_seq_pwr_error3;
  seq_pwr_err4      s_seq_pwr_error4;
  seq_pwr_err5      s_seq_pwr_error5;
  seq_pwr_continue  s_seq_pwr_continue;
  seq_pwr_discontinue  s_seq_pwr_discontinue;  
  seq_pwr_test      s_seq_pwr_test;
  seq_clk_reset     s_seq_clk_reset;
  seq_rst_manual_db s_seq_manrst;
  seq_bbus_reset_db s_seq_rstdb;

   virtual task body();
   ovm_report_info(get_type_name(), "********************************************************", OVM_HIGH);
   ovm_report_info(get_type_name(), "invoke 'virtual power bbus sequence'", OVM_NONE); 
   ovm_report_info(get_type_name(), "********************************************************", OVM_HIGH);
   fork
   `ovm_do_on(s_seq_clk, p_sequencer.clk_seqr)
   `ovm_do_on(s_seq_fn,  p_sequencer.fn_seqr)
   `ovm_do_on(s_seq_rst, p_sequencer.rst_seqr)
      begin
          `ovm_do_on(s_seq_clk_reset,   p_sequencer.clk_seqr)
         ovm_report_info(get_type_name(), "********************************************************", OVM_MEDIUM);
         ovm_report_info(get_type_name(), "Power sequence Prasanna", OVM_NONE); 
         ovm_report_info(get_type_name(), "********************************************************", OVM_MEDIUM);
					//
					//#500us          
					#3337670000ps
          `ovm_do_on(s_seq_pwr_startup,         p_sequencer.pwr_seqr)
          //`ovm_do_on(s_seq_pwr,   p_sequencer.pwr_seqr)
      end
   join
  endtask : body

endclass: virtual_power_sequence
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
SIMULATION TRANSCRIPT
----------------------
# *****************************************************
# * Questa OVM Transaction Recording Turned ON.       *
# *  To turn off, set 'recording_detail' to off:      *
# *   set_config_int("*", "recording_detail", 0);     *
# *****************************************************
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_spi_temp_agent.m_monitor [spi_slave_monitor] SPI[0] access with CPHA: 1
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_spi_temp_agent.m_monitor [spi_slave_monitor] SPI[0] access with CPOL: 0
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_spi_temp_agent.m_driver [spi_slave_driver] SPI[0] access with CPHA: 1
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_spi_temp_agent.m_driver [spi_slave_driver] SPI[0] access with CPOL: 0
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_spi_osci_agent.m_monitor [spi_slave_monitor] SPI[0] access with CPHA: 0
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_spi_osci_agent.m_monitor [spi_slave_monitor] SPI[0] access with CPOL: 1
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_spi_osci_agent.m_driver [spi_slave_driver] SPI[0] access with CPHA: 0
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_spi_osci_agent.m_driver [spi_slave_driver] SPI[0] access with CPOL: 1
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_spi_ocxo_agent.m_monitor [spi_slave_monitor] SPI[0] access with CPHA: 0
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_spi_ocxo_agent.m_monitor [spi_slave_monitor] SPI[0] access with CPOL: 0
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_spi_curr_agent.m_monitor [spi_slave_monitor] SPI[0] access with CPHA: 1
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_spi_curr_agent.m_monitor [spi_slave_monitor] SPI[0] access with CPOL: 1
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_spi_curr_agent.m_driver [spi_slave_driver] SPI[0] access with CPHA: 1
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_spi_curr_agent.m_driver [spi_slave_driver] SPI[0] access with CPOL: 1
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Start reset input detection
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Start reset output detection
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_fni_agent.m_driver [fn_driver] Sequence received with	FrameNumber: 0	and FrameID 0
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for input reset: 0000000
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000000
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000000
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000000
# OVM_INFO @ 0: reporter [virtual_power_sequence] invoke 'virtual power bbus sequence'
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_rst_env.r_sequencer [seq_rst_base] base class of rst_sequencer
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_fni_agent.m_driver [fn_driver] Sequence received with	PPS_valid: ON_FREQ	GPS_valid: ON_FREQ	FreqOffset: -1
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_fni_agent.m_sequencer [seq_fn_base] base class of fn_sequencer
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_clk_agent.m_sequencer [seq_clk_base] base class of clk_sequencer
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_clk_agent.m_sequencer [seq_clk_reset]  Start reset sequence clk_sequencer
# OVM_INFO @ 0: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for input reset: 1001100
# OVM_INFO @ 20000000: ovm_test_top.m_tb_env.m_clk_agent.m_sequencer [seq_clk_reset]  Finished reset sequence clk_sequencer
# OVM_INFO @ 20000000: reporter [virtual_power_sequence] ********************************************************
# OVM_INFO @ 20000000: reporter [virtual_power_sequence] Power sequence Prasanna
# OVM_INFO @ 20000000: reporter [virtual_power_sequence] ********************************************************
# OVM_INFO @ 20010000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for input reset: 1001110
# OVM_INFO @ 20050000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for input reset: 1001111
# ** Warning: (vsim-7) Failed to open readmem file "PicoBlazeTest.bin" in read mode.
# 
# No such file or directory. (errno = ENOENT)    : D:/SVN/ccssah/trunk/design/ccssa_test_lib/hdl/spi_slave_responder.sv(113)
#    Time: 20050 ns  Iteration: 1  Region: /ovm_pkg::ovm_root::m_do_phase
# OVM_INFO @ 20570000: ovm_test_top.m_tb_env.m_spi_ocxo_agent.m_monitor [spi_slave_monitor] SPI[0] access started
# OVM_INFO @ 20870000: ovm_test_top.m_tb_env.m_spi_ocxo_agent.m_monitor [spi_slave_monitor] SPI[0] data_mosi: 0x80 and SPI first: 1
# OVM_INFO @ 20870000: ovm_test_top.m_tb_env.m_spi_ocxo_agent.m_monitor [spi_slave_monitor] SPI[0] data_miso: 0x00 and SPI first: 1
# OVM_INFO @ 21190000: ovm_test_top.m_tb_env.m_spi_ocxo_agent.m_monitor [spi_slave_monitor] SPI[0] data_mosi: 0x00 and SPI first: 0
# OVM_INFO @ 21190000: ovm_test_top.m_tb_env.m_spi_ocxo_agent.m_monitor [spi_slave_monitor] SPI[0] data_miso: 0x00 and SPI first: 0
# OVM_INFO @ 21230000: ovm_test_top.m_tb_env.m_spi_ocxo_agent.m_monitor [spi_slave_monitor] SPI[0] access finished
# @          3337670000 pgood_int-3-2-1-0: x-x-x-x
# OVM_INFO @ 3357671000: ovm_test_top.m_tb_env.m_pwr_agent.m_sequencer [seq_pwr_start] Start PWR UP sequence
# @          3357671000 req.pwr_good-3-2-1-0: 0-0-0-0
# @          3357671000 rsp.pwr_good-3-2-1-0: 0-0-0-0
# @          3357671000 pgood_int-3-2-1-0: 0-0-0-0
# @          3357680000 req.pwr_good-3-2-1-0: 1-1-0-1
# @          3357680000 rsp.pwr_good-3-2-1-0: 1-1-0-1
# @          3357680000 pgood_int-3-2-1-0: 1-1-0-1
# OVM_INFO @ 3357720000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good Step1 Access at Pin interface with Data: 1
# OVM_INFO @ 3357720000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good 5v0_com Access at Pin interface with Data: 1
# OVM_INFO @ 3387680000: ovm_test_top.m_tb_env.m_pwr_agent.m_sequencer [seq_pwr_start] PGOOG_Step1
# @          3387680000 req.pwr_good-3-2-1-0: 0-0-0-1
# @          3387680000 rsp.pwr_good-3-2-1-0: 0-0-0-1
# @          3387680000 pgood_int-3-2-1-0: 0-0-0-1
# @          3387690000 req.pwr_good-3-2-1-0: 1-0-1-1
# @          3387690000 rsp.pwr_good-3-2-1-0: 1-0-1-1
# @          3387690000 pgood_int-3-2-1-0: 1-0-1-1
# OVM_INFO @ 3387730000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good 5v0_com Access at Pin interface with Data: 1
# @          3485650000 pgood_int-3-2-1-0: 1-0-1-1
# OVM_INFO @ 3485690000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good Step2 Access at Pin interface with Data: 1
# OVM_INFO @ 3565670000: ovm_test_top.m_tb_env.m_pwr_agent.m_sequencer [seq_pwr_start] PGOOG_Step2
# @          3565670000 req.pwr_good-3-2-1-0: 0-0-1-1
# @          3565670000 rsp.pwr_good-3-2-1-0: 0-0-1-1
# @          3565670000 pgood_int-3-2-1-0: 0-0-1-1
# @          3565680000 req.pwr_good-3-2-1-0: 1-1-1-1
# @          3565680000 rsp.pwr_good-3-2-1-0: 1-1-1-1
# @          3565680000 pgood_int-3-2-1-0: 1-1-1-1
# OVM_INFO @ 3565710000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good 5v0_com Access at Pin interface with Data: 0
# OVM_INFO @ 3565720000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good Test Access at Pin interface with Data: 1
# @          3633650000 pgood_int-3-2-1-0: 1-1-1-1
# OVM_INFO @ 3633690000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good Step3 Access at Pin interface with Data: 1
# @          3781650000 pgood_int-3-2-1-0: 1-1-1-1
# OVM_INFO @ 3781690000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good Step4 Access at Pin interface with Data: 1
# OVM_INFO @ 3814610000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000001
# OVM_INFO @ 3846630000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000001001
# OVM_INFO @ 3846630000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000001101
# OVM_INFO @ 3846630000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000001111
# OVM_INFO @ 3846670000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000111
# OVM_INFO @ 3846670000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000011
# OVM_INFO @ 3846670000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000001
# OVM_INFO @ 3846690000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000000
# OVM_INFO @ 3891640000: ovm_test_top.m_tb_env.m_pwr_agent.m_sequencer [seq_pwr_start] PGOOG_Step3
# @          3891640000 req.pwr_good-3-2-1-0: 0-1-1-1
# @          3891640000 rsp.pwr_good-3-2-1-0: 0-1-1-1
# @          3891640000 pgood_int-3-2-1-0: 0-1-1-1
# @          3891650000 req.pwr_good-3-2-1-0: 1-1-1-0
# @          3891650000 rsp.pwr_good-3-2-1-0: 1-1-1-0
# @          3891650000 pgood_int-3-2-1-0: 1-1-1-0
# OVM_INFO @ 3891680000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good Test Access at Pin interface with Data: 0
# OVM_INFO @ 3891690000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good Step1 Access at Pin interface with Data: 0
# OVM_INFO @ 3891690000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good Step4 Access at Pin interface with Data: 1
# OVM_INFO @ 3891690000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good 5v0_com Access at Pin interface with Data: 1
# @          3891750000 pgood_int-3-2-1-0: 1-1-1-0
# @          3891770000 pgood_int-3-2-1-0: 1-1-1-0
# @          3891790000 pgood_int-3-2-1-0: 1-1-1-0
# OVM_INFO @ 3891810000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good Step2 Access at Pin interface with Data: 0
# OVM_INFO @ 3891830000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good Step3 Access at Pin interface with Data: 0
# @          3929630000 pgood_int-3-2-1-0: 1-1-1-0
# OVM_INFO @ 3929670000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good Step4 Access at Pin interface with Data: 0
# @          4039630000 pgood_int-3-2-1-0: 1-1-1-0
# @          4187650000 pgood_int-3-2-1-0: 1-1-1-0
# @          4335630000 pgood_int-3-2-1-0: 1-1-1-0
# OVM_INFO @ 4365590000: ovm_test_top.m_tb_env.m_pwr_agent.m_sequencer [seq_pwr_start] PGOOG_Step4
# @          4365590000 req.pwr_good-3-2-1-0: 1-1-1-1
# @          4365590000 rsp.pwr_good-3-2-1-0: 1-1-1-1
# @          4365590000 pgood_int-3-2-1-0: 1-1-1-1
# @          4365600000 req.pwr_good-3-2-1-0: 0-0-1-1
# @          4365600000 rsp.pwr_good-3-2-1-0: 0-0-1-1
# @          4365600000 pgood_int-3-2-1-0: 0-0-1-1
# OVM_INFO @ 4365630000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good Step1 Access at Pin interface with Data: 1
# OVM_INFO @ 4365630000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good 5v0_com Access at Pin interface with Data: 0
# OVM_INFO @ 4365640000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good Test Access at Pin interface with Data: 1
# OVM_INFO @ 4395600000: ovm_test_top.m_tb_env.m_pwr_agent.m_sequencer [seq_pwr_start] PGOOG_5V0_COM
# OVM_INFO @ 4395600000: ovm_test_top.m_tb_env.m_pwr_agent.m_sequencer [seq_pwr_start] Finished PWR UP sequence
# @          4395600000 req.pwr_good-3-2-1-0: 0-0-0-0
# @          4395600000 rsp.pwr_good-3-2-1-0: 0-0-0-0
# @          4395600000 pgood_int-3-2-1-0: 0-0-0-0
# @          4395610000 req.pwr_good-3-2-1-0: 1-0-1-1
# @          4395610000 rsp.pwr_good-3-2-1-0: 1-0-1-1
# @          4395610000 pgood_int-3-2-1-0: 1-0-1-1
# OVM_INFO @ 4395650000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good Step1 Access at Pin interface with Data: 1
# OVM_INFO @ 4395650000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good Test Access at Pin interface with Data: 1
# OVM_INFO @ 4480610000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000001
# @          4483650000 pgood_int-3-2-1-0: 1-0-1-1
# OVM_INFO @ 4483690000: ovm_test_top.m_tb_env.m_pwr_agent.m_monitor [pwr_monitor] Power Good Step2 Access at Pin interface with Data: 1
# OVM_INFO @ 4512630000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000001001
# OVM_INFO @ 4512630000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000001101
# OVM_INFO @ 4512630000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000001111
# OVM_INFO @ 4512670000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000111
# OVM_INFO @ 4512670000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000011
# OVM_INFO @ 4512670000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000001
# OVM_INFO @ 4512690000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000000
# @          4631650000 pgood_int-3-2-1-0: 1-0-1-1
# @          4779650000 pgood_int-3-2-1-0: 1-0-1-1
# @          4927630000 pgood_int-3-2-1-0: 1-0-1-1
# @          5075650000 pgood_int-3-2-1-0: 1-0-1-1
# OVM_INFO @ 5146610000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000001
# OVM_INFO @ 5178630000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000001001
# OVM_INFO @ 5178630000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000001101
# OVM_INFO @ 5178630000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000001111
# OVM_INFO @ 5178670000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000111
# OVM_INFO @ 5178670000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000011
# OVM_INFO @ 5178670000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000001
# OVM_INFO @ 5178690000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000000
# @          5223630000 pgood_int-3-2-1-0: 1-0-1-1
# @          5371650000 pgood_int-3-2-1-0: 1-0-1-1
# @          5519630000 pgood_int-3-2-1-0: 1-0-1-1
# @          5667650000 pgood_int-3-2-1-0: 1-0-1-1
# OVM_INFO @ 5812610000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000001
# @          5815630000 pgood_int-3-2-1-0: 1-0-1-1
# OVM_INFO @ 5844630000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000001001
# OVM_INFO @ 5844630000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000001101
# OVM_INFO @ 5844630000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000001111
# OVM_INFO @ 5844670000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000111
# OVM_INFO @ 5844670000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000011
# OVM_INFO @ 5844670000: ovm_test_top.m_tb_env.m_rst_env.r_monitor [rst_monitor] Reset change detected for output reset: 000000001
# @          5963650000 pgood_int-3-2-1-0: 1-0-1-1
# @          6111630000 pgood_int-3-2-1-0: 1-0-1-1
# @          6259650000 pgood_int-3-2-1-0: 1-0-1-1
# @          6407630000 pgood_int-3-2-1-0: 1-0-1-1
# @          6555650000 pgood_int-3-2-1-0: 1-0-1-1
2

One thing to be aware of is that OVM will start a “default_sequence” on your sequencer at time 0. This will cause some random transactions to appear which will interfere with the sequence you start as part of your test.

You can disable this automatic sequence from starting by setting “count” using set_config_int() to 0 for the sequencer.

3

In reply to cgales:

Hi Cgales,

Thanks for the inputs! however I tried adding the set_config_int() to my test case but still the randomization happens.

Here is the testcase [i] am executing, where i included the set_config_int()

TESTCASE CODE

class test_pwr_seq extends ccssa_tb;
`ovm_component_utils(test_pwr_seq)

function new(string name = “test_pwr_seq”, ovm_component parent = null);
super.new(name,parent);
endfunction : new

virtual function void build();
super.build();
set_config_int(“m_tb_env.m_pwr_agent.m_sequencer”, “count”,0); // added the build function to include the set_config_int()
endfunction : build

function void start_of_simulation();
//factory.set_type_override_by_type(seq_pwr_base::get_type(), seq_pwr_start::get_type());
factory.set_type_override_by_type(virtual_ctrl_sequence::get_type(), virtual_power_sequence::get_type());
endfunction: start_of_simulation;

task run();
#30ms;
ovm_report_info(get_type_name(), “Testcase for power sequencer is finished.”);
global_stop_request();
endtask : run

endclass : test_pwr_seq

4

In reply to karunani:

You need to make sure that you call all of your set_config_*() calls prior to building your components. In your build() phase, you are calling super.build() first, which will build your environment, then you call set_config_int(). Call set_config_int() first, then call super.build().

5

In reply to cgales:

Hi Cgales,

Thanks a lot to correct my mistake while supporting to address my issue.
This time I had modified my ENV itself by calling the set_config_int() for “m_pwr_agent.m_sequencer” prior to super.build() in the ENV code. However the randomization still happens

Here is the modified code

ENV CODE

class tb_env extends ovm_env;

//the following two bits are used to control whether checks and coverage are done
bit checks_enable = 1;
bit coverage_enable = 1;

virtual_sequencer m_virtual_sequencer;

bbus_agent m_bbus_agent;
led_agent m_led_agent;
pwr_agent m_pwr_agent;
clk_agent m_clk_agent;
fan_agent m_fan3_agent;
fan_agent m_fan4_agent;
fan_agent m_fan5_agent;
fn_agent m_fni_agent;
fn_agent m_fno_agent;
fseb_agent m_fsebrx_agent;
fseb_agent m_fsebtx_agent;
tpm_agent m_tpm_agent;
rp1_agent m_rp1_agent;
rp1_agent m_rp1o_agent;
spi_slave_agent m_spi_ocxo_agent;
spi_slave_agent m_spi_temp_agent;
spi_slave_agent m_spi_curr_agent;
spi_slave_agent m_spi_osci_agent;
rst_env m_rst_env;

// local vaiable
logic unused;

function new(string name = “tb_env”, ovm_component parent = null);
super.new(name,parent);
endfunction : new

virtual function void build();

set_config_int("*", "coverage_enable", coverage_enable);
// Configuration of agents
set_config_int("m_bbus_agent", "is_active", OVM_ACTIVE);
set_config_int("m_led_agent", "is_active", OVM_PASSIVE);
set_config_int("m_pwr_agent", "is_active", OVM_ACTIVE);
set_config_int("m_clk_agent", "is_active", OVM_ACTIVE);
set_config_int("m_fan?_agent", "is_active", OVM_ACTIVE);
set_config_int("m_tpm_agent", "is_active", OVM_ACTIVE);
set_config_int("m_rp1_agent", "is_active", OVM_ACTIVE);
set_config_int("m_rp1o_agent", "is_active", OVM_PASSIVE);
set_config_int("m_fni_agent", "is_active", OVM_ACTIVE);
set_config_int("m_fno_agent", "is_active", OVM_PASSIVE);
set_config_int("m_fsebrx_agent", "is_active", OVM_ACTIVE);
set_config_int("m_fsebtx_agent", "is_active", OVM_PASSIVE);
set_config_int("m_spi_ocxo_agent", "is_active", OVM_PASSIVE);
set_config_int("m_spi_temp_agent", "is_active", OVM_ACTIVE);
set_config_int("m_spi_curr_agent", "is_active", OVM_ACTIVE);
set_config_int("m_spi_osci_agent", "is_active", OVM_ACTIVE);
set_config_int("m_rst_env", "is_active", OVM_ACTIVE);

set_config_int("m_led_agent", "num_agent", 8);
set_config_int("m_tpm_agent", "serirq_clients", nr_serirq_clients);
set_config_int("m_spi_osci_agent", "cpol", 1);
set_config_int("m_spi_curr_agent", "cpol", 1);
set_config_int("m_spi_curr_agent", "cpha", 1);
set_config_int("m_spi_temp_agent", "cpha", 1);

//Configuration: Disable subsequencer sequences:
set_config_int("m_bbus_agent.m_sequencer", "count", 0);
set_config_int("m_pwr_agent.m_sequencer", "count", 0);      // This is my required sequencer to be stopped randomizing
set_config_int("m_clk_agent.m_sequencer", "count", 0);
set_config_int("m_clk_agent.m_ip_sequencer", "count", 0);
set_config_int("m_fan?_agent.m_sequencer", "count", 0);
set_config_int("m_fni_agent.m_sequencer", "count", 0);
set_config_int("m_fsebrx_agent.m_sequencer", "count", 0);
set_config_int("m_spi_temp_agent.m_sequencer", "count", 30);
set_config_int("m_spi_curr_agent.m_sequencer", "count", 30);
set_config_int("m_spi_osci_agent.m_sequencer", "count", 30);
set_config_int("m_rp1_agent.m_sequencer", "count", 0);
set_config_int("m_tpm_agent.m_ssequencer", "count", 0);
set_config_int("m_rst_env.r_sequencer", "count", 0);
//set_config_int("m_rst_env.s_responder", "coverage_enable", coverage_enable);
//Configuration: Set the default sequence for the virtual sequencer:
set_config_string("m_virtual_sequencer", "default_sequence", "virtual_ctrl_sequence");

super.build();

m_bbus_agent   = bbus_agent::type_id::create("m_bbus_agent", this);
m_led_agent    = led_agent::type_id::create("m_led_agent", this);
m_pwr_agent    = pwr_agent::type_id::create("m_pwr_agent", this);
m_clk_agent    = clk_agent::type_id::create("m_clk_agent", this);
m_fan3_agent   = fan_agent::type_id::create("m_fan3_agent", this);
m_fan4_agent   = fan_agent::type_id::create("m_fan4_agent", this);
m_fan5_agent   = fan_agent::type_id::create("m_fan5_agent", this);
m_rp1_agent    = rp1_agent::type_id::create("m_rp1_agent", this);
m_rp1o_agent   = rp1_agent::type_id::create("m_rp1o_agent", this);
m_fni_agent    = fn_agent::type_id::create("m_fni_agent", this);
m_fno_agent    = fn_agent::type_id::create("m_fno_agent", this);
m_tpm_agent    = tpm_agent::type_id::create("m_tpm_agent", this);
m_fsebrx_agent = fseb_agent::type_id::create("m_fsebrx_agent", this);
m_fsebtx_agent = fseb_agent::type_id::create("m_fsebtx_agent", this);
m_spi_ocxo_agent  = spi_slave_agent::type_id::create("m_spi_ocxo_agent", this);
m_spi_temp_agent  = spi_slave_agent::type_id::create("m_spi_temp_agent", this);
m_spi_curr_agent  = spi_slave_agent::type_id::create("m_spi_curr_agent", this);
m_spi_osci_agent  = spi_slave_agent::type_id::create("m_spi_osci_agent", this);
m_rst_env  = rst_env::type_id::create("m_rst_env", this);

m_virtual_sequencer = virtual_sequencer::type_id::create("m_virtual_sequencer", this);

endfunction : build

function void connect();
m_virtual_sequencer.bbus_seqr = m_bbus_agent.m_sequencer;
m_virtual_sequencer.pwr_seqr = m_pwr_agent.m_sequencer;
m_virtual_sequencer.rst_seqr = m_rst_env.r_sequencer;
m_virtual_sequencer.clk_seqr = m_clk_agent.m_sequencer;
m_virtual_sequencer.ip_seqr = m_clk_agent.m_ip_sequencer;
m_virtual_sequencer.fan3_seqr = m_fan3_agent.m_sequencer;
m_virtual_sequencer.fan4_seqr = m_fan4_agent.m_sequencer;
m_virtual_sequencer.fan5_seqr = m_fan5_agent.m_sequencer;
m_virtual_sequencer.fn_seqr = m_fni_agent.m_sequencer;
m_virtual_sequencer.fsebrx_seqr = m_fsebrx_agent.m_sequencer;
m_virtual_sequencer.serirq_seqr = m_tpm_agent.m_ssequencer;
m_virtual_sequencer.rp1_seqr = m_rp1_agent.m_sequencer;

m_bbus_agent.assign_vi(top.bbi0);
m_led_agent.assign_vi(top.duti0);
m_pwr_agent.assign_vi(top.duti0);
m_clk_agent.assign_vi(top.bbi0, top.duti0);
m_fan3_agent.assign_vi(top.fan3);
m_fan4_agent.assign_vi(top.fan4);
m_fan5_agent.assign_vi(top.fan5);
m_rp1_agent.assign_vi(top.rp1_in);
m_rp1o_agent.assign_vi(top.rp1_out);
m_fni_agent.assign_vi(top.fn_in);
m_fno_agent.assign_vi(top.fn_out);
m_tpm_agent.assign_vi(top.tpm);
m_fsebrx_agent.assign_vi(top.can_rx);
m_fsebtx_agent.assign_vi(top.can_tx);
m_spi_ocxo_agent.assign_vi(top.si_ocxo);
m_spi_temp_agent.assign_vi(top.si_temp);
m_spi_curr_agent.assign_vi(top.si_curr);
m_spi_osci_agent.assign_vi(top.si_osci);
m_rst_env.assign_vi(top.duti0);

m_virtual_sequencer.assign_vi(top.bbi0);

endfunction : connect

function void end_of_elaboration();
endfunction : end_of_elaboration

function void start_of_simulation();
endfunction: start_of_simulation;

virtual task run();
endtask: run

ovm_component_utils_begin(tb_env) ovm_field_int(checks_enable, OVM_ALL_ON)
ovm_field_int(coverage_enable, OVM_ALL_ON) ovm_component_utils_end

endclass : tb_env

Here is the agent code just putting it here for reference, but nothing modified

AGENT CODE

class pwr_agent extends ovm_agent;

 protected virtual interface dut_if di0;
 
 protected ovm_active_passive_enum is_active = OVM_ACTIVE;
 protected bit coverage_enable;

 pwr_driver    m_driver;
 pwr_sequencer m_sequencer;
 pwr_monitor   m_monitor;

 `ovm_component_utils_begin(pwr_agent)
      `ovm_field_enum(ovm_active_passive_enum, is_active, OVM_ALL_ON)
      `ovm_field_int(coverage_enable, OVM_ALL_ON)
 `ovm_component_utils_end

 function new (string name = "pwr_agent", ovm_component parent);
      super.new(name, parent);
 endfunction : new

 function void build();
      super.build();
      set_config_int("m_monitor", "coverage_enable", coverage_enable);
      set_config_int("m_monitor", "monitor_id", 1);
      m_monitor = pwr_monitor::type_id::create("m_monitor", this);
      if(is_active == OVM_ACTIVE) begin
           set_config_int("m_driver", "pwr_id", 0);
           m_sequencer = pwr_sequencer::type_id::create("m_sequencer", this);
           m_driver = pwr_driver::type_id::create("m_driver", this);
      end
 endfunction : build

 function void assign_vi(virtual interface dut_if di0);
      this.di0 = di0;
      m_monitor.assign_vi(di0);
      if(is_active == OVM_ACTIVE) begin
           m_driver.assign_vi(di0);
      end
 endfunction : assign_vi

 function void connect();
      if(is_active == OVM_ACTIVE) begin
           m_driver.seq_item_port.connect(m_sequencer.seq_item_export);
      end
 endfunction : connect

endclass : pwr_agent

Removed the set_config_int() from the testcase

TESTCASE CODE

class test_pwr_seq extends ccssa_tb;
`ovm_component_utils(test_pwr_seq)

function new(string name = “test_pwr_seq”, ovm_component parent = null);
super.new(name,parent);
endfunction : new

// virtual function void build();
// set_config_int(“m_tb_env.m_pwr_agent.m_sequencer”, “count”,0);
// super.build();
// endfunction : build

function void start_of_simulation();
//factory.set_type_override_by_type(seq_pwr_base::get_type(), seq_pwr_start::get_type());
factory.set_type_override_by_type(virtual_ctrl_sequence::get_type(), virtual_power_sequence::get_type());
endfunction: start_of_simulation;

task run();
#30ms;
ovm_report_info(get_type_name(), “Testcase for power sequencer is finished.”);
global_stop_request();
endtask : run

endclass : test_pwr_seq