My understanding of UVM testbenches is that when sequences, sequencers, and drivers are all parameterized using the same sequence item type, then I can simply call `uvm_do(seq), and it knows what sequencer to use based on the sequence item type. Is that a correct base assumption?
So what happens when I move up the design stack vertically, and I want to re-sue some lower-level sequences - but my TB now contains multiple instances of the same sequencer/driver pair? How does my sequence know which sequencer to use? Do I now have to call `uvm_do_on(seq, sqr)? This could potentially be a lot to keep track of.... I'm thinking of a module that contains 128+ instances of a sub-module, each with their own intf/env/agt/sqr/drv.