Thanks Vaibhav. I've gone through this example, I can see that lower sequencer is registered to a sequence (upper_2_lower_seq) which translate upper sequence (ATM cells) to lower sequence (APB trans). Ideally lower sequencer act as a slave to upper sequencer for driving upper sequencer's data by using upper_2_lower_seq.
My requirement is that I want to use the lower_sequencer as both master and slave. ie, It should able to work for its own sequences (APB trans) and whenever high level packets (ATM cells) are available, it should act on upper_2_lower_seq.