[irun] Problem to reproduce the same result in every simulation?

Dear all,

I am doing the first OVM verification task. After finding some bugs I commit the testbench in RCS. but design owner could not reproduce the same result as I did. is there anything that I need to notice?

  • irun version is the same.

  • svseed is the same.

  • testbench is the same.

  • design could be different. (at least the stimulus should be the same before DUT reacts)

Hope anyone could help! thank you.

Dear all,

After some experiments, the results shows the same file content but put them in different path would affect the random result. is that ture? if yes,
how do you solve this?

is svseed the only one random source?

Hi Yhchou, With the available information it is difficult to comment on the issue that you are facing. I have not worked in RCS environment with OVM but I could try checking if I get more information. I would look forward to know what is the difference in result in details between you and your designers. First I would suggest you could check if you see the same behaviour difference between your design and your design owners with out RCS. I would recommend that you send an email to [EMAIL=support@cadence.com]_support@cadence.com_[/EMAIL] or to me at [EMAIL=chinmay@cadence.com]_chinmay@cadence.com_[/EMAIL] with more details on your results I look forward to your mail. Regards Chinmay [EMAIL=chinmay@cadence.com]_chinmay@cadence.com_[/EMAIL]

Dear Chinmay,

Thank you for the help. Actually I have solved it by trun off the ovm_seeding (default on) a while ago. it is a good news to us.

ovm_object::use_ovm_seeding = 0;

and this issue could be solved.