Accellera has the Verification Intellectual Property Technical Subcommittee (VIP-TSC) that is coming to a major juncture in their long term program goal. (Read the VIP-TSC co-chair's statement about its work and long term goal at http://www.chipdesignmag.com/print.php?articleId=3553?issueId=35.)
The article addresses the Accellera plan for a Common Base Class Library (CBCL). The Accellera committee plans to use OVM 2.1.1 as the basis for its CBCL, which they want to call the "Universal Verification Methodology" or UVM. There will probably be more added to UVM as it continues its standardization process. At the moment, three features are being considered. Two of features are already in OVM 2.1.1 and a thrid one would be newly added. I have discussed the three features in my recent blog post about Mentor's UVM-EA code that was upload on ovmworld.org.
At this time there is little difference between OVM and UVM's definition. However, some user companies have expressed an interest to standardize on UVM as it becomes a standard. If that is the case, early access to this evolving work is important for those who support or offer OVM products, as one would expect these prominent adopter companies to drive demand for UVM.