I want to check that one signal at one level of rtl is always equal other signal in down the hierarchy
of rtl after some configuration is done.
I am having a ovm sequence which is configuring registers, after configuration is done i want check this
assertion. Let me know in what all methods this can be done.
It is independent of OVM.I don’t write anything in sequence.
In top level where you have instantiated RTL , instantiate one more module called
my block_asserts,pass the arguments it to taking from RTL hierarchical paths then write assertions in that module like
module top_wrapper()
top_rtl top_rtl_inst(a,b,c);
myblock_asserts ass(top_rtl_inst.config_done,top_rtl_inst.a,top_rtl_inst.next_level.b)
endmoudle