Transition bins

Question

Q1. Why can we not assign fixed size array to transition bins?
This is the error compiler throws: Fatal: (vsim-8541) A fixed-size array transition bin 'd4' is found in Coverpoint 'c1' of Covergroup instance '\/transition_bins/#ublk#243269587#33/c '. It is illegal to have such fixed-szie array transition bin per LRM.
# Time: 0 ns Iteration: 0 Process: /transition_bins/#INITIAL#35 File: transition_bins.sv

Q2. Why can we not assign a dynamic array to a non-consecutive transition bin?

Here is the sample: bins d8[] = (12 => 15[=3] => 10);

Here is the error it throws: Fatal: (vsim-8568) Unbounded or undetermined varying length sequences formed using Repetitive/Consecutive operators are not allowed in unsized Array Transition bins. A transition item in bin 'd8' of Coverpoint 'c1' in Covergroup instance '\/transition_bins/#ublk#243269587#33/c ' has an operator of kind '[= ]'. Please fix it.

Thanks in advance.

Answer 1

Rahulkumar

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173 posts

May 02, 2022 at 11:07 am

In reply to Shashank Gurijala:

Quote:

Q1. Why can we not assign fixed size array to transition bins?
This is the error compiler throws: Fatal: (vsim-8541) A fixed-size array transition bin 'd4' is found in Coverpoint 'c1' of Covergroup instance '\/transition_bins/#ublk#243269587#33/c '. It is illegal to have such fixed-szie array transition bin per LRM.
# Time: 0 ns Iteration: 0 Process: /transition_bins/#INITIAL#35 File: transition_bins.sv

Can you share the code ?

Quote:

Q2. Why can we not assign a dynamic array to a non-consecutive transition bin?
Here is the sample: bins d8[] = (12 => 15[=3] => 10);

Here is the error it throws: Fatal: (vsim-8568) Unbounded or undetermined varying length sequences formed using Repetitive/Consecutive operators are not allowed in unsized Array Transition bins. A transition item in bin 'd8' of Coverpoint 'c1' in Covergroup instance '\/transition_bins/#ublk#243269587#33/c ' has an operator of kind '[= ]'. Please fix it.

Thanks in advance.

// This is unbounded length sequence (12...=>15...=>15...=>15...=> 10).   
// so using [] won't allowed
bins d8[]    =  (12 => 15[=3] => 10); // 12...=>15...=>15...=>15...=> 10
 
//Few examples   
bins d8[] =  (12 => 15[=3] => 10); //Not valid as unbounded length sequence (12...=>15...=>15...=>15...=> 10)
 
bins d8[] =  (12 => 15[->3] => 10); //Not valid as unbounded length sequence (12...=>15...=>15...=>15=>10)
 
bins d8[] =  (12 => 15[*3] => 10); //Valid as bound length sequence (12=>15=>15=>15=>10)
 
bins trans_3[] = (3[*3:5]);  //Valid as bound length sequence 3=>3=>3, 3=>3=>3=>3, 3=>3=>3=>3=>3
 
bins d8[] =  (12 => 15[*3:5] => 10); //Valid as bound length sequence 
//(12=>15=>15=>15=>10), (12=>15=>15=>15=>15=>10), (12=>15=>15=>15=>15=>15=>10)

Answer 2

Shashank Gurijala

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91 posts

May 02, 2022 at 11:28 am

In reply to Rahulkumar:

Thanks!
And there isn't really any need to share the code anymore because the explanation clarified my doubt.

Answer 3

Shashank Gurijala

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91 posts

May 02, 2022 at 8:33 pm

In reply to Rahulkumar:

Oh yes, I almost forgot!

Consider, bins b1[] = (3 => 8);
This transition bin creates only one bin implicitly (though explicitly defined).

Consider, bins b1[1] = (3 => 8);
This transition bin is explicitly created and 1 is entered and this throws a compiler error and it is:
Fatal: (vsim-8541) A fixed-size array transition bin 'd1' is found in Coverpoint 'c1' of Covergroup instance '\/transition_bins/#ublk#243269587#36/c '. It is illegal to have such fixed-szie array transition bin per LRM.

Why can I not delcare fixed sized bins to the above example even though there is only one bin that is created an user mentions it?

Thanks!

Answer 4

Rahulkumar

Full Access

173 posts

May 02, 2022 at 11:45 pm

In reply to Shashank Gurijala:

//All three are valid
bins b1 = (3 => 8); 
bins b1[] = (3 => 8);
bins b1[1] = (3 => 8);

Look like you are getting error from other coverpoint.

Answer 5

Shashank Gurijala

Full Access

91 posts

May 03, 2022 at 12:22 am

In reply to Rahulkumar:

There is only one coverpoint for data and here is the code:

module transition_bins;
 
	bit [3:0] data;
 
	longint count;
 
	covergroup cg;
 
		c1: coverpoint data { 
 
				 /*bins d1[]  =  (9 => 3); 							  
                                 bins d2[]    =  (4 => 8 => 12);
			         bins d3[]    =  (2,3 => 4,5);
                                 bins d4[]    =  (2,3,4 => 5,6,7); 
	                         bins d5[]    =  (4'hd[*2] => 5,6,7);							  
                                 bins d6[]    =  (7[*2:4]);
			         bins d7      =  (9 => 5[->3] => 11); 
                                 bins d8      =  (12 => 15[=3] => 10);*/   //this is working fine
 
			         bins d1[1]   =  (9 => 3); 							  
                                 bins d2[]    =  (4 => 8 => 12);
			         bins d3[]    =  (2,3 => 4,5);
                                 bins d4[]    =  (2,3,4 => 5,6,7); 
	                         bins d5[]    =  (4'hd[*2] => 5,6,7);							  
                                 bins d6[]    =  (7[*2:4]);
			         bins d7      =  (9 => 5[->3] => 11); 
                                 bins d8      =  (12 => 15[=3] => 10); //this throws an error
 
                                  }
 
 
	endgroup: cg
 
	initial 
 
		begin
 
			cg c = new;
 
			count = 0;
 
			while (c.get_inst_coverage != 100.0000)
 
				begin
 
					count++;
 
					data = $random;
 
					$display("\ndata = %0h",data);
 
					c.sample();
 
				end
 
			$display("\n\n*********[FOREVER LOOP ITERATED %0d TIMES]*********",count);
 
			$display("\n\t\tCoverage: %0.4f%%",c.get_inst_coverage);
 
			$display("\nThe number of repetetions needed for %0.4f%% coverage is exactly %0d",c.get_inst_coverage,count);
 
		end
 
endmodule

Here is the error:

Fatal: (vsim-8541) A fixed-size array transition bin 'd1' is found in Coverpoint 'c1' of Covergroup instance '\/transition_bins/#ublk#243269587#36/c '. It is illegal to have such fixed-szie array transition bin per LRM.
# Time: 0 ns Iteration: 0 Process: /transition_bins/#INITIAL#38 File: transition_bins.sv
# Fatal error at transition_bins.sv line 7
#
# HDL call sequence:
# Stopped at transition_bins.sv 7
# called from transition_bins.sv 38
#
# Fatal error reported during simulation. Cannot run 'fcover' command. Please look above output for the fatal error message(s).
#
# Fatal error reported during simulation. Cannot run 'fcover' command. Please look above output for the fatal error message(s).

Answer 6

Rahulkumar

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173 posts

May 03, 2022 at 1:26 am

In reply to Shashank Gurijala:

It's working fine for me.

Answer 7

Shashank Gurijala

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91 posts

May 03, 2022 at 1:42 am

In reply to Rahulkumar:
What?? Why?? How??

Answer 8

Shashank Gurijala

Full Access

91 posts

May 03, 2022 at 4:01 am

In reply to Rahulkumar:

Here, let me show you the errors from four different compilers on EDA Playground:

QUESTA:

Fatal: (vsim-8541) A fixed-size array transition bin 'd1' is found in Coverpoint 'c1' of Covergroup instance '\/transition_bins/#ublk#243269587#37/c '. It is illegal to have such fixed-szie array transition bin per LRM.
# Time: 0 ns Iteration: 0 Process: /transition_bins/#INITIAL#39 File: design.sv
# Fatal error at design.sv line 8
#
# HDL call sequence:
# Stopped at design.sv 8 - -
# called from design.sv 39 - -
# exit
# End time: 06:44:20 on May 03,2022, Elapsed time: 0:00:01
# Errors: 1, Warnings: 1

ALDEC PRO:

ERROR VCP2000 "Syntax error. Unexpected token: (." "design.sv" 11 50
FAILURE "Compile failure 1 Errors 0 Warnings Analysis time: 0[s]."
Exit code expected: 0, received: 255

CADENCE:

TOOL: xrun 20.09-s003: Started on May 03, 2022 at 06:58:00 EDT
xrun: 20.09-s003: (c) Copyright 1995-2020 Cadence Design Systems, Inc.
bins d1[1] = (9 => 3); //sequence of transitions: even if the user knows there is only 1 bin created, specifying it in the "[]" throws an error. But unlike goto or non-consecutive repetetions, user can define dynamic bins as they're bounded.
|
xmvlog: *E,ECBSTE (design.sv,11|27): System verilog does not allow specifying size with transition bins.
cg c = new;
|
xmvlog: *W,VARCGT (design.sv,38|8): Covergroup instance declaration shall be separated from its creation and moved out of the local scope.
xmvlog: *W,NOTOPL: no top-level unit found, must have recursive instances.
xrun: *E,VLGERR: An error occurred during parsing. Review the log file for errors with the code *E and fix those identified problems to proceed. Exiting with code (status 1).
TOOL: xrun 20.09-s003: Exiting on May 03, 2022 at 06:58:00 EDT (total: 00:00:00)
Exit code expected: 0, received: 1

SYNOPSIS: //though it is isn't throwing any errors, the coverage is 0.0000%

Coverage: 0.0000%
V C S S i m u l a t i o n R e p o r t
Time: 0 ns
CPU Time: 0.520 seconds; Data structure size: 0.0Mb
Tue May 3 06:59:42 2022

Even when I remove the 1 from b1, synopsis is showing coverage 0.0000% for 100 repetetions. Questa is showing around 22%

Answer 9

Rahulkumar

Full Access

173 posts

May 03, 2022 at 4:53 am

In reply to Shashank Gurijala:

I am running in SYNOPSIS.

// To track coverage information for each instance, addition to the cumulative coverage information for covergroup, set per_instance = 1; 
option.per_instance = 1;
 
//in your code
covergroup cg;
           option.per_instance = 1;
           //coverpoint code ....
           ///.......
endgroup

To get cumulative coverage use get_coverage()

Answer 10

Shashank Gurijala

Full Access

91 posts

May 03, 2022 at 5:19 am

In reply to Rahulkumar:

Any idea why the other three are throwing error?

Answer 11

Solution

dave_59

Forum Moderator

10908 posts

May 03, 2022 at 8:43 am

In reply to Shashank Gurijala:

It's an error because the syntax does not allow it.

| [ wildcard] bins_keyword bin_identifier [ [ ] ] = trans_list [ iff ( expression ) ]

No expression is allowed in between the [ ]'s. There is no mechanism for distributing an arbitrary number of transition bins across a fixed number of bins.

— Dave Rich, Verification Architect, Siemens EDA

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