Ignoring cross coverage bins

Coverage
1

Hi,

I have declared a cross coverage consisting of 3 coverpoint. And it auto generate 8 coverpoints. Now, i have declared user defined 2 bins as valid cross bins. (my intention is to generate only this two cross cover bins and to ignore remaining auto generated bins), but still i could still see there exists 6 auto generated bins. What are the ways that I can generate only my valid cross coverpoint and ignore other auto generate bins.

code snippet :

cross_abc : cross c_a;c_b;c_c
{ bins cx_c_a = binsof (c_a) intersect {1};
bins cx_c_b = binsof (c_b) intersect {1}; }

it generates 2 user defined bins cx_c_a and cx_c_b. But it also generates other auto bin which i am trying to ignore.

2

In reply to debashis_paul:
When you cross multiple coverpoints, SystemVerilog creates all the cross bins for you and your only choices are to merge those cross bins as your cross_abc does above, or to ignore them using
ignore_bins. There are many ways to express sets of cross bins, so I would need to see what you are actually trying to cover. Sometimes, its easier to change the way you write your coverpoints to prevent the unwanted cross bins to get created in the first place.