In reply to divyadm:
To add to Manju@GE pointed, the code coverage does not care about functional intent. Simulator would treat verilog code of processor same as that of network switch when it comes to code coverage. It will only speak language of lines, conditions, toggle, FSM etc. If you want to look at the coverage from functional point of view like instructions or packets you need functional coverage.
Code coverage also cannot address concurrency and sequences. These can come out either functional requirements or internal design implementation. Both of these needs to be covered as part of functional coverage.
For every line of specification: Think about three things.
 What it means to stimulus?
 What it means to check?
 and what it means to coverage?