In reply to sj1992:
You last comment is hard to understand without more details. You should be able to create an iff clause for the bin that is true only when var_1 transitions using $changed.
There is no transition bin syntax that allows for indefinite repetition. A cover directive has much more expressive syntax and would be much more scalable. But it requires a whole new area of learning SystemVerilog.
Also, you are not supposed to be using a covergroup as a checker, if this is just a counter, knowing that it had all the values 0-15 should be good enough for coverage.
Note that the iff clause needs to be on the sampling event clock, not on the coverpoint or bin.