How to get Sequence Coverage in UVM?

Hello All,

Please let me know how to calculate the sequence coverage in UVM env.

Why I want :

  1. This will let know which sequence still not fired.
  2. To discover hole in functional coverage.
  3. Discover unnecessary sequence, as to find the sequence without which the coverage goal still achieved.

Thanks,
Karandeep

The appropriate methodology is to gather functional coverage of the transactions at the DUT level via your agent’s monitor. Proper analysis of the functional coverage and how it relates to specific tests will then allow you to determine which test/seed combinations (and therefore which sequences) are most effective for testing your DUT. This analysis will also determine any uncovered areas so that you can adjust your tests accordingly.

In reply to cgales:

Thanks for the help !!

But I have a question over here, all the sequences throw the common sequence item to driver, so how could it be mapped with the functional coverage.

Lets say, if I could be sending a information like sequence_id created by user with it, then again it would not give the uncovered sequences unless or untill I am not updating all the sequence ids in the coverage monitor cover bins, every time after creating the new sequence.

Since the tool knows the all the sequence that were built and that were run, so is there anyway to calculate using tool database or others.


Karandeep

In reply to karandeepsingh:

The right methodology is to collect the info from the bus with your monitor and deduce from the bus what is the randomization you have triggered. This is normally done in the scoreboard by accumulating some xfers from the monitor.
I known it is easier to create a channel from the sequencer of your virtual sequence to your coverage class. However, that is incorrect from the methodology point of view. If you create a channel from the virtual sequenceR to pass that information, then you will do your scoreboard or your coverage class not reusable.
Your scoreboard/coverage class will only work if you have a sequence which provides that specific sequence input. That is not the methodology in UVM. What if you want to test another testcase? what if you use other extern sequence which doesn´t send that info? What if you change your sequence master by another VHDL Master?. In those cases your scoreboard/coverage class will not be complete because depends on the sequence.

Having said that. There are some cases where you would like to create a special coverage which is only valid for a specific sequence. For example, you want to test a data error insertion and you want to cover the position of this error on a data stream as master. The error position coming from the master sequence in the bus is not detectable from the bus even in the datastream has CRC. You introduce errors because you would like to see that the slave doesn´t hang or that the slave detects the error with CRC (although position is not possible to detect).
In those cases, the BUS is not enough to know in which byte the error was introduced. You can only detect that an error was introduced with the CRC.

I would propose to split these two kind of coverage because one is only for that sequence and the other is the correct coverage for your block. Later, on in your testplan you can select what covergroups you want to see if you want from the sequence coverage or from the block coverage. In other words, you will have one coverage class for your block in your scoreboard, and another covergroups inside your sequence. covergroup in sequences | Verification Academy
So you will not use config data base to pass sequence coverage to your block coverage. You just declare the covergroups in the sequence (ensuring per_instance=0).

I am still not sure if that is acceptable from the methodology point of view. What do you think?