How to get array of coverpoints

I have an array of pointers, say ptr[192], each of its element can take 3 values 0,1,2.
How do i define the coverage for the complete array? Can I do something like:

generate for(i=0;i<192;i=i+1) begin
coverpoint ptr[i] { bins ptr_val[3] = {0,1,2}} ;
endgenerate

You can’t use a generate statement inside a covergroup. But you can declare an array of covergroups each with a single coverpoint:

   bit [1:0] ptr[192];
   covergroup ptr_val_cg(ref bit [1:0] ptr);
      coverpoint ptr { bins ptr_val = {0,1,2};}
   endgroup 

   ptr_val_cg ptr_cg[192];
   initial begin
      foreach (ptr[i])
	ptr_cg[i] = new(ptr[i]);
   end

In reply to dave_59:

Hi Dave,

I ran into the same issue. How do we make your solution work for a case where we want to cross the individual coverpoints (of the array) with some other coverpoint? We can’t cross coverpoints from different covergroups right?

Thanks,
Satish

In reply to itsmyturn:

This would be difficult to specify for an array, even if you were allowed to cross coverpoints from different covergroups.

It might help to explain what you are looking for coverage of. There might be a simpler approach using a function with some other code around it.

In reply to dave_59:

The tool we’re using doesn’t support array of covergroups :). I also felt it’s easier to look at coverage results if the coverage of the whole array is in one covergroup as opposed to looking at an array of covergroups. I’m just trying to write coverage for a multidimensional array and I’m trying to avoid typing all the entries of the array.

In reply to itsmyturn:
SystemVerilog does not support arrays of covergroups embedded in classes. If that is your issue, you can define the covergroup outside the class, or you can create an array of classes with the covergroup embedded. Unfortunately, SystemVerilog covegroups were only designed to deal with integral types, not arrays.

It would really help to see the examples of what you are trying to cover.

In reply to dave_59:

My covergroup is inside a module and not a class. I’m trying to cover all values of this counter variable(for all combinations of the higher dimensions).
logic [4:0][7:0][2:0] counter;

The [4:0] dimension is one hot (so, it can hold 5 values)
The [7:0] dimension is one hot (so, it can hold 8 values)
The [2:0] can be any value (it’s not decoded) and is what will be my coverpoint variable.

So, I’m trying to see if there’s a way of writing these 40 coverpoints without typing each of them. Please let me know if what I wrote above isn’t clear. Thanks for the help.

In reply to dave_59:

Hi Dave,

As per my understanding, taking “array of covergroup inside a class, with covergroup definition outside class” is a valid SystemVerilog semantic.
Can you please confirm about the same? Also, it would be great if you can point to or copy paste the LRM description for the same. I could not find the exact mention about this in LRM.

Best Regards,
Gaurang

In reply to gaurangchitroda:

It’s because of this stamenent

A covergroup declaration within a class is an embedded covergroup declaration. An embedded covergroup declaration declares an anonymous covergroup type and an instance variable of the anonymous type. The covergroup_identifier defines the name of the instance variable.

There’s no syntax that allows you to declare any array of instance variables with this anonymous type.

In reply to dave_59:

Hi Dave,

Is the restriction of “one cannot have array of covergroups is only for a class?” or does it apply for a module as well?

I meant, can we have array of covergroups inside a module?

Thanks,
Madhu

In reply to mseyunni:

You can instantiate an array of covergroups anywhere you can instantiate a single covergroup instance. The only restriction is you can’t declare a covergroup inside a class and instantiate an array of that same covergroup.

In reply to dave_59:

in the below EDA link , i am getting the error , that array of covergroup instances cannot be created .

Can you please explain me why is it so ?even if system verilog supports it

In reply to rajivdesh:

You picked the one older simulator that doesn’t support this yet.

You have a bunch of other errors. See covergroup array - EDA Playground

In reply to dave_59:

Hi Dave,
How can we do cross coverage in below case. I want to do cross coverage between coverpoint xyz and all the elements of ptr_cg.

bit [1:0] ptr[192];
   covergroup ptr_val_cg(ref bit [1:0] ptr);
      coverpoint ptr { bins ptr_val = {0,1,2};}
   endgroup 
   class cov_mon
     ptr_val_cg ptr_cg[192];
     int xyz;
     function new();
      foreach (ptr[i])
	ptr_cg[i] = new(ptr[i]);
     endfunction
     covergroup new_cg();
       coverpoint xyz;
     endgroup
   endclass
   end

In reply to irshad_mansur:

You cannot cross coverpoints between different coverpoints. You can put the coverpoint xyz inside the same covergroup by making it another argument of ptr_val_cg.

bit [1:0] ptr[192];
   covergroup ptr_val_cg(ref bit [1:0] ptr, int xy);
      coverpoint ptr { bins ptr_val = {0,1,2};}
      cross ptr,xy
   endgroup 
   class cov_mon
     ptr_val_cg ptr_cg[192];
     int xyz;
     function new();
      foreach (ptr[i])
	ptr_cg[i] = new(ptr[I],xyz);
     endfunction
   endclass