How to disable automatically-generated cross bins?

Coverage
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1

Consider the following example code:(it’s an example in SystemVerilog P1800-2009, Page 500)

int i,j;
covergroup ct;
  coverpoint i { bins i[] = { [0:1] }; }
  coverpoint j { bins j[] = { [0:1] }; }
  x1: cross i,j;
  x2: cross i,j {
    bins i_zero = binsof(i) intersect { 0 };
    }
endgroup

Cross x2 has the following bins:
i_zero // user-specified bin for
(i[1],j[0]) // an automatically-generated bin that is retained
(i[1],j[1]) // an automatically-generated bin that is retained

My question is: if I only want the first bin, i.e. i_zero, what should I do? I don’t want automatically-generated cross bins, I just want user-defined bins, is there some method to disable “automatically-generated cross bins”?

Thanks a lot!

2

There is no way to disable all “automatically-generated cross bins” like default in a coverpoint bin. Generally you are trying to collapse the set of individual automatically generated bins into larger bins.

To get a narrower set of cross bins, you have several options. My first suggestion would be to narrow the coverpoints in the cross. This would show your intent best.

int i,j;
covergroup ct;
  i0: coverpoint i { bins i = { 0 }; }
  i1: coverpoint i { bins i = { 1 }; }
  coverpoint j { bins j[] = { [0:1] }; }
  x1: cross i,j;
  x2: cross i0,j;
endgroup

The next suggestion would be to use ignore_bins. There are many different types of expressions in a cross bin, but for this simple example, you might use

int i,j;
covergroup ct;
  coverpoint i { bins i[] = { [0:1] }; }
  coverpoint j { bins j[] = { [0:1] }; }
  x1: cross i,j;
  x2: cross i,j {
    bins i_zero = binsof(i) intersect { 0 };
    ignore_bins ignore = ! binsof(i) intersect { 0 };
    }
endgroup

But this becomes more difficult to manage as you get more complicated crosses.

3

In reply to dave_59:

Hi, dave:
Thanks for your reply.
But I find a new option which can satisfy my requirement – “option.cross_auto_bin_max = 0”.
After use this option, the cross coverage will only include user-defined bins, it will not include automatically-generated cross bins.


coverpoint i { bins i[] = { [0:1] }; }
coverpoint j { bins j[] = { [0:1] }; }
x2: cross i,j {
option.cross_auto_bin_max = 0;
bins i_zero = binsof(i) intersect { 0 };
}
endgroup

In this way, it will only include one bin: i_zero.

But I’m very curiuos that, why this option(cross_auto_bin_max) is not defined in IEEE SystemVerilog Standard? I can only find this option in SystemVerilog 3.1a Language Reference Manual, I can’t find it in P1800-2005, P1800-2009, P1800-2012. Why? Does this option be related to tools? I think this option should be a feature of Systemverilog, but not EDA tools, am I right?
Thanks!

4

Yes, it was removed from the IEEE 1800-2005 LRM because it was poorly defined. See 0000641: Remove cross_auto_bin_max - Accellera Mantis.

In my opinion, the whole functional coverage section of the SV LRM is poorly defined. cross_auto_bin_max = 0 makes sense, but other values do not. So they could have created a different option or renamed it, but the committee choose the easiest route to remove it instead.